From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:44792) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hMCnB-0003WO-Bi for qemu-devel@nongnu.org; Thu, 02 May 2019 10:34:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hMCn9-0008OT-9N for qemu-devel@nongnu.org; Thu, 02 May 2019 10:34:33 -0400 Received: from mail02.asahi-net.or.jp ([202.224.55.14]:41242) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hMCn7-0008Jh-AM for qemu-devel@nongnu.org; Thu, 02 May 2019 10:34:29 -0400 From: Yoshinori Sato Date: Thu, 2 May 2019 23:33:57 +0900 Message-Id: <20190502143409.59600-1-ysato@users.sourceforge.jp> Subject: [Qemu-devel] [PATCH RFC v8 00/12] Add RX archtecture support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Yoshinori Sato , peter.maydell@linaro.org, richard.henderson@linaro.org Hello. This patch series is added Renesas RX target emulation. It was corrected because the correspondence to registerfield was insufficient. My git repository is bellow. git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git Testing binaries bellow. u-boot Download - https://osdn.net/users/ysato/pf/qemu/dl/u-boot.bin.gz starting $ gzip -d u-boot.bin.gz $ qemu-system-rx -bios u-boot.bin linux and pico-root (only sash) Download - https://osdn.net/users/ysato/pf/qemu/dl/zImage (kernel) https://osdn.net/users/ysato/pf/qemu/dl/rx-qemu.dtb (DeviceTree) starting $ qemu-system-rx -kernel zImage -dtb rx-qemu.dtb -append "earlycon" Changes for v7. Fix bra.l and bsr.l instructions. Following the fix of the master branch. Yoshinori Sato (12): target/rx: TCG translation target/rx: TCG helper target/rx: CPU definition target/rx: RX disassembler target/rx: Miscellaneous files hw/intc: RX62N interrupt controller (ICUa) hw/timer: RX62N internal timer modules hw/char: RX62N serical communication interface (SCI) hw/rx: RX Target hardware definition Add rx-softmmu MAINTAINERS: Add RX hw/registerfields.h: Add 8bit and 16bit register macros. configure | 8 + default-configs/rx-softmmu.mak | 7 + include/disas/dis-asm.h | 5 + include/hw/char/renesas_sci.h | 45 + include/hw/intc/rx_icu.h | 49 + include/hw/registerfields.h | 28 +- include/hw/rx/rx.h | 7 + include/hw/rx/rx62n.h | 54 + include/hw/timer/renesas_cmt.h | 33 + include/hw/timer/renesas_tmr.h | 46 + include/sysemu/arch_init.h | 1 + target/rx/cpu-qom.h | 52 + target/rx/cpu.h | 196 ++++ target/rx/helper.h | 31 + arch_init.c | 2 + hw/char/renesas_sci.c | 341 ++++++ hw/intc/rx_icu.c | 373 ++++++ hw/rx/rx62n.c | 226 ++++ hw/rx/rxqemu.c | 100 ++ hw/timer/renesas_cmt.c | 277 +++++ hw/timer/renesas_tmr.c | 458 ++++++++ target/rx/cpu.c | 222 ++++ target/rx/disas.c | 1481 ++++++++++++++++++++++++ target/rx/gdbstub.c | 112 ++ target/rx/helper.c | 148 +++ target/rx/monitor.c | 38 + target/rx/op_helper.c | 481 ++++++++ target/rx/translate.c | 2433 ++++++++++++++++++++++++++++++++++++++++ MAINTAINERS | 19 + hw/Kconfig | 1 + hw/char/Kconfig | 3 + hw/char/Makefile.objs | 2 +- hw/intc/Makefile.objs | 1 + hw/rx/Kconfig | 2 + hw/rx/Makefile.objs | 1 + hw/timer/Kconfig | 6 + hw/timer/Makefile.objs | 3 + target/rx/Makefile.objs | 11 + target/rx/insns.decode | 617 ++++++++++ 39 files changed, 7918 insertions(+), 2 deletions(-) create mode 100644 default-configs/rx-softmmu.mak create mode 100644 include/hw/char/renesas_sci.h create mode 100644 include/hw/intc/rx_icu.h create mode 100644 include/hw/rx/rx.h create mode 100644 include/hw/rx/rx62n.h create mode 100644 include/hw/timer/renesas_cmt.h create mode 100644 include/hw/timer/renesas_tmr.h create mode 100644 target/rx/cpu-qom.h create mode 100644 target/rx/cpu.h create mode 100644 target/rx/helper.h create mode 100644 hw/char/renesas_sci.c create mode 100644 hw/intc/rx_icu.c create mode 100644 hw/rx/rx62n.c create mode 100644 hw/rx/rxqemu.c create mode 100644 hw/timer/renesas_cmt.c create mode 100644 hw/timer/renesas_tmr.c create mode 100644 target/rx/cpu.c create mode 100644 target/rx/disas.c create mode 100644 target/rx/gdbstub.c create mode 100644 target/rx/helper.c create mode 100644 target/rx/monitor.c create mode 100644 target/rx/op_helper.c create mode 100644 target/rx/translate.c create mode 100644 hw/rx/Kconfig create mode 100644 hw/rx/Makefile.objs create mode 100644 target/rx/Makefile.objs create mode 100644 target/rx/insns.decode -- 2.11.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB67EC04AA9 for ; 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Thu, 02 May 2019 10:34:33 -0400 Received: from mail02.asahi-net.or.jp ([202.224.55.14]:41242) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hMCn7-0008Jh-AM for qemu-devel@nongnu.org; Thu, 02 May 2019 10:34:29 -0400 Received: from h61-195-96-97.vps.ablenet.jp (h61-195-96-97.vps.ablenet.jp [61.195.96.97]) (Authenticated sender: PQ4Y-STU) by mail02.asahi-net.or.jp (Postfix) with ESMTPA id 445333BC3C; Thu, 2 May 2019 23:34:24 +0900 (JST) Received: from ysato.dip.jp (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by h61-195-96-97.vps.ablenet.jp (Postfix) with ESMTPSA id 05D0A240085; Thu, 2 May 2019 23:34:21 +0900 (JST) From: Yoshinori Sato To: qemu-devel@nongnu.org Date: Thu, 2 May 2019 23:33:57 +0900 Message-Id: <20190502143409.59600-1-ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.11.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 202.224.55.14 Subject: [Qemu-devel] [PATCH RFC v8 00/12] Add RX archtecture support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, richard.henderson@linaro.org, Yoshinori Sato Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="UTF-8" Message-ID: <20190502143357.WCohi0oW4FpZHEO5iOdtWGmjrK6BPtxovRzUYSQmPvg@z> Hello. This patch series is added Renesas RX target emulation. It was corrected because the correspondence to registerfield was insufficient. My git repository is bellow. git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git Testing binaries bellow. u-boot Download - https://osdn.net/users/ysato/pf/qemu/dl/u-boot.bin.gz starting $ gzip -d u-boot.bin.gz $ qemu-system-rx -bios u-boot.bin linux and pico-root (only sash) Download - https://osdn.net/users/ysato/pf/qemu/dl/zImage (kernel) https://osdn.net/users/ysato/pf/qemu/dl/rx-qemu.dtb (DeviceTree) starting $ qemu-system-rx -kernel zImage -dtb rx-qemu.dtb -append "earlycon" Changes for v7. Fix bra.l and bsr.l instructions. Following the fix of the master branch. Yoshinori Sato (12): target/rx: TCG translation target/rx: TCG helper target/rx: CPU definition target/rx: RX disassembler target/rx: Miscellaneous files hw/intc: RX62N interrupt controller (ICUa) hw/timer: RX62N internal timer modules hw/char: RX62N serical communication interface (SCI) hw/rx: RX Target hardware definition Add rx-softmmu MAINTAINERS: Add RX hw/registerfields.h: Add 8bit and 16bit register macros. configure | 8 + default-configs/rx-softmmu.mak | 7 + include/disas/dis-asm.h | 5 + include/hw/char/renesas_sci.h | 45 + include/hw/intc/rx_icu.h | 49 + include/hw/registerfields.h | 28 +- include/hw/rx/rx.h | 7 + include/hw/rx/rx62n.h | 54 + include/hw/timer/renesas_cmt.h | 33 + include/hw/timer/renesas_tmr.h | 46 + include/sysemu/arch_init.h | 1 + target/rx/cpu-qom.h | 52 + target/rx/cpu.h | 196 ++++ target/rx/helper.h | 31 + arch_init.c | 2 + hw/char/renesas_sci.c | 341 ++++++ hw/intc/rx_icu.c | 373 ++++++ hw/rx/rx62n.c | 226 ++++ hw/rx/rxqemu.c | 100 ++ hw/timer/renesas_cmt.c | 277 +++++ hw/timer/renesas_tmr.c | 458 ++++++++ target/rx/cpu.c | 222 ++++ target/rx/disas.c | 1481 ++++++++++++++++++++++++ target/rx/gdbstub.c | 112 ++ target/rx/helper.c | 148 +++ target/rx/monitor.c | 38 + target/rx/op_helper.c | 481 ++++++++ target/rx/translate.c | 2433 ++++++++++++++++++++++++++++++++++++++++ MAINTAINERS | 19 + hw/Kconfig | 1 + hw/char/Kconfig | 3 + hw/char/Makefile.objs | 2 +- hw/intc/Makefile.objs | 1 + hw/rx/Kconfig | 2 + hw/rx/Makefile.objs | 1 + hw/timer/Kconfig | 6 + hw/timer/Makefile.objs | 3 + target/rx/Makefile.objs | 11 + target/rx/insns.decode | 617 ++++++++++ 39 files changed, 7918 insertions(+), 2 deletions(-) create mode 100644 default-configs/rx-softmmu.mak create mode 100644 include/hw/char/renesas_sci.h create mode 100644 include/hw/intc/rx_icu.h create mode 100644 include/hw/rx/rx.h create mode 100644 include/hw/rx/rx62n.h create mode 100644 include/hw/timer/renesas_cmt.h create mode 100644 include/hw/timer/renesas_tmr.h create mode 100644 target/rx/cpu-qom.h create mode 100644 target/rx/cpu.h create mode 100644 target/rx/helper.h create mode 100644 hw/char/renesas_sci.c create mode 100644 hw/intc/rx_icu.c create mode 100644 hw/rx/rx62n.c create mode 100644 hw/rx/rxqemu.c create mode 100644 hw/timer/renesas_cmt.c create mode 100644 hw/timer/renesas_tmr.c create mode 100644 target/rx/cpu.c create mode 100644 target/rx/disas.c create mode 100644 target/rx/gdbstub.c create mode 100644 target/rx/helper.c create mode 100644 target/rx/monitor.c create mode 100644 target/rx/op_helper.c create mode 100644 target/rx/translate.c create mode 100644 hw/rx/Kconfig create mode 100644 hw/rx/Makefile.objs create mode 100644 target/rx/Makefile.objs create mode 100644 target/rx/insns.decode -- 2.11.0