qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: David Gibson <david@gibson.dropbear.id.au>
To: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Cc: groug@kaod.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, clg@kaod.org
Subject: Re: [Qemu-devel] [QEMU-PPC] [PATCH 03/13] target/ppc: Add SPR ASDR
Date: Mon, 6 May 2019 16:16:43 +1000	[thread overview]
Message-ID: <20190506061643.GI6790@umbus.fritz.box> (raw)
In-Reply-To: <20190503055316.6441-4-sjitindarsingh@gmail.com>

[-- Attachment #1: Type: text/plain, Size: 2229 bytes --]

On Fri, May 03, 2019 at 03:53:06PM +1000, Suraj Jitindar Singh wrote:
> The Access Segment Descriptor Register (ASDR) provides information about
> the storage element when taking a hypervisor storage interrupt. When
> performing nested radix address translation, this is normally the guest
> real address. This register is present on POWER9 processors and later.
> 
> Implement the ADSR, note read and write access is limited to the
> hypervisor.
> 
> Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>

Reviewed-by: David Gibson <david@gibson.dropbear.id.au>

> ---
>  target/ppc/cpu.h                | 1 +
>  target/ppc/translate_init.inc.c | 6 ++++++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 19b3e1de0e..8d66265e5a 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -1797,6 +1797,7 @@ void ppc_compat_add_property(Object *obj, const char *name,
>  #define SPR_MPC_MD_DBRAM1     (0x32A)
>  #define SPR_RCPU_L2U_RA3      (0x32B)
>  #define SPR_TAR               (0x32F)
> +#define SPR_ASDR              (0x330)
>  #define SPR_IC                (0x350)
>  #define SPR_VTB               (0x351)
>  #define SPR_MMCRC             (0x353)
> diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
> index 9cd33e79ef..a0cae58e19 100644
> --- a/target/ppc/translate_init.inc.c
> +++ b/target/ppc/translate_init.inc.c
> @@ -8243,6 +8243,12 @@ static void gen_spr_power9_mmu(CPUPPCState *env)
>                          SPR_NOACCESS, SPR_NOACCESS,
>                          &spr_read_generic, &spr_write_ptcr,
>                          KVM_REG_PPC_PTCR, 0x00000000);
> +    /* Address Segment Descriptor Register */
> +    spr_register_hv(env, SPR_ASDR, "ASDR",
> +                    SPR_NOACCESS, SPR_NOACCESS,
> +                    SPR_NOACCESS, SPR_NOACCESS,
> +                    &spr_read_generic, &spr_write_generic,
> +                    0x0000000000000000);
>  #endif
>  }
>  

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

  parent reply	other threads:[~2019-05-06  6:54 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-03  5:53 [Qemu-devel] [QEMU-PPC] [PATCH 00/13] target/ppc: Implement KVM support under TCG Suraj Jitindar Singh
2019-05-03  5:53 ` Suraj Jitindar Singh
2019-05-03  5:53 ` [Qemu-devel] [QEMU-PPC] [PATCH 01/13] target/ppc: Implement the VTB for HV access Suraj Jitindar Singh
2019-05-03  5:53   ` Suraj Jitindar Singh
2019-05-06  6:02   ` David Gibson
2019-05-03  5:53 ` [Qemu-devel] [QEMU-PPC] [PATCH 02/13] target/ppc: Work [S]PURR implementation and add HV support Suraj Jitindar Singh
2019-05-03  5:53   ` Suraj Jitindar Singh
2019-05-06  6:15   ` David Gibson
2019-05-07  1:28     ` Suraj Jitindar Singh
2019-05-09  6:45       ` David Gibson
2019-05-03  5:53 ` [Qemu-devel] [QEMU-PPC] [PATCH 03/13] target/ppc: Add SPR ASDR Suraj Jitindar Singh
2019-05-03  5:53   ` Suraj Jitindar Singh
2019-05-06  6:16   ` David Gibson [this message]
2019-05-03  5:53 ` [Qemu-devel] [QEMU-PPC] [PATCH 04/13] target/ppc: Add SPR TBU40 Suraj Jitindar Singh
2019-05-03  5:53   ` Suraj Jitindar Singh
2019-05-06  6:17   ` David Gibson
2019-05-03  5:53 ` [Qemu-devel] [QEMU-PPC] [PATCH 05/13] target/ppc: Add privileged message send facilities Suraj Jitindar Singh
2019-05-03  5:53   ` Suraj Jitindar Singh
2019-05-10  2:09   ` David Gibson
2019-05-03  5:53 ` [Qemu-devel] [QEMU-PPC] [PATCH 06/13] target/ppc: Enforce that the root page directory size must be at least 5 Suraj Jitindar Singh
2019-05-03  5:53   ` Suraj Jitindar Singh
2019-05-10  2:11   ` David Gibson
2019-05-03  5:53 ` [Qemu-devel] [QEMU-PPC] [PATCH 07/13] target/ppc: Handle partition scoped radix tree translation Suraj Jitindar Singh
2019-05-03  5:53   ` Suraj Jitindar Singh
2019-05-10  2:28   ` David Gibson
2019-05-03  5:53 ` [Qemu-devel] [QEMU-PPC] [PATCH 08/13] target/ppc: Implement hcall H_SET_PARTITION_TABLE Suraj Jitindar Singh
2019-05-03  5:53   ` Suraj Jitindar Singh
2019-05-10  2:30   ` David Gibson
2019-05-03  5:53 ` [Qemu-devel] [QEMU-PPC] [PATCH 09/13] target/ppc: Implement hcall H_ENTER_NESTED Suraj Jitindar Singh
2019-05-03  5:53   ` Suraj Jitindar Singh
2019-05-10  2:57   ` David Gibson
2019-05-03  5:53 ` [Qemu-devel] [QEMU-PPC] [PATCH 10/13] target/ppc: Implement hcall H_TLB_INVALIDATE Suraj Jitindar Singh
2019-05-03  5:53   ` Suraj Jitindar Singh
2019-05-10  6:28   ` David Gibson
2019-05-03  5:53 ` [Qemu-devel] [QEMU-PPC] [PATCH 11/13] target/ppc: Implement hcall H_COPY_TOFROM_GUEST Suraj Jitindar Singh
2019-05-03  5:53   ` Suraj Jitindar Singh
2019-05-10  6:32   ` David Gibson
2019-05-03  5:53 ` [Qemu-devel] [QEMU-PPC] [PATCH 12/13] target/ppc: Introduce POWER9 DD2.2 cpu type Suraj Jitindar Singh
2019-05-03  5:53   ` Suraj Jitindar Singh
2019-05-10  6:32   ` David Gibson
2019-05-03  5:53 ` [Qemu-devel] [QEMU-PPC] [PATCH 13/13] target/ppc: Enable SPAPR_CAP_NESTED_KVM_HV under tcg Suraj Jitindar Singh
2019-05-03  5:53   ` Suraj Jitindar Singh
2019-05-10  6:34   ` David Gibson
2019-05-03  5:58 ` [Qemu-devel] [QEMU-PPC] [PATCH 00/13] target/ppc: Implement KVM support under TCG Suraj Jitindar Singh
2019-05-03  5:58   ` Suraj Jitindar Singh
2019-05-06  6:20 ` David Gibson
2019-05-06 23:45   ` Suraj Jitindar Singh

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190506061643.GI6790@umbus.fritz.box \
    --to=david@gibson.dropbear.id.au \
    --cc=clg@kaod.org \
    --cc=groug@kaod.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=sjitindarsingh@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).