From: Yoshinori Sato <ysato@users.sourceforge.jp>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, richard.henderson@linaro.org,
Yoshinori Sato <ysato@users.sourceforge.jp>
Subject: [Qemu-devel] [PATCH v9 00/13] Add RX archtecture support
Date: Mon, 6 May 2019 22:14:31 +0900 [thread overview]
Message-ID: <20190506131444.120869-1-ysato@users.sourceforge.jp> (raw)
Hello.
This patch series is added Renesas RX target emulation.
It fixed to the comment that I got in the review.
My git repository is bellow.
git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git rx-20190505
Testing binaries bellow.
u-boot
Download - https://osdn.net/users/ysato/pf/qemu/dl/u-boot.bin.gz
starting
$ gzip -d u-boot.bin.gz
$ qemu-system-rx -bios u-boot.bin
linux and pico-root (only sash)
Download - https://osdn.net/users/ysato/pf/qemu/dl/zImage (kernel)
https://osdn.net/users/ysato/pf/qemu/dl/rx-qemu.dtb (DeviceTree)
starting
$ qemu-system-rx -kernel zImage -dtb rx-qemu.dtb -append "earlycon"
Changes for v8.
- Fix conditional branch in always false case.
- Fix initialize flags value.
- Fix disassembler output.
- Add missing dependency in disas.o
- Remove debug printf in renesas_sci.
- Add g_assert_not_reached in rx_icu.
- Rewrite FIELD_EX8 and FIELD_EX16.
- Add extract8 and extract16.
Yoshinori Sato (13):
target/rx: TCG translation
target/rx: TCG helper
target/rx: CPU definition
target/rx: RX disassembler
target/rx: Miscellaneous files
hw/intc: RX62N interrupt controller (ICUa)
hw/timer: RX62N internal timer modules
hw/char: RX62N serial communication interface (SCI)
hw/rx: RX Target hardware definition
Add rx-softmmu
MAINTAINERS: Add RX
hw/registerfields.h: Add 8bit and 16bit register macros.
qemu/bitops.h: Add extract8 and extract16
configure | 8 +
default-configs/rx-softmmu.mak | 7 +
include/disas/dis-asm.h | 5 +
include/hw/char/renesas_sci.h | 45 +
include/hw/intc/rx_icu.h | 49 +
include/hw/registerfields.h | 32 +-
include/hw/rx/rx.h | 7 +
include/hw/rx/rx62n.h | 54 +
include/hw/timer/renesas_cmt.h | 33 +
include/hw/timer/renesas_tmr.h | 46 +
include/qemu/bitops.h | 38 +
include/sysemu/arch_init.h | 1 +
target/rx/cpu-qom.h | 52 +
target/rx/cpu.h | 196 ++++
target/rx/helper.h | 31 +
arch_init.c | 2 +
hw/char/renesas_sci.c | 340 ++++++
hw/intc/rx_icu.c | 375 +++++++
hw/rx/rx62n.c | 240 ++++
hw/rx/rxqemu.c | 100 ++
hw/timer/renesas_cmt.c | 277 +++++
hw/timer/renesas_tmr.c | 458 ++++++++
target/rx/cpu.c | 222 ++++
target/rx/disas.c | 1480 ++++++++++++++++++++++++
target/rx/gdbstub.c | 112 ++
target/rx/helper.c | 148 +++
target/rx/monitor.c | 38 +
target/rx/op_helper.c | 481 ++++++++
target/rx/translate.c | 2432 ++++++++++++++++++++++++++++++++++++++++
MAINTAINERS | 19 +
hw/Kconfig | 1 +
hw/char/Kconfig | 3 +
hw/char/Makefile.objs | 2 +-
hw/intc/Makefile.objs | 1 +
hw/rx/Kconfig | 2 +
hw/rx/Makefile.objs | 1 +
hw/timer/Kconfig | 6 +
hw/timer/Makefile.objs | 3 +
target/rx/Makefile.objs | 12 +
target/rx/insns.decode | 617 ++++++++++
40 files changed, 7974 insertions(+), 2 deletions(-)
create mode 100644 default-configs/rx-softmmu.mak
create mode 100644 include/hw/char/renesas_sci.h
create mode 100644 include/hw/intc/rx_icu.h
create mode 100644 include/hw/rx/rx.h
create mode 100644 include/hw/rx/rx62n.h
create mode 100644 include/hw/timer/renesas_cmt.h
create mode 100644 include/hw/timer/renesas_tmr.h
create mode 100644 target/rx/cpu-qom.h
create mode 100644 target/rx/cpu.h
create mode 100644 target/rx/helper.h
create mode 100644 hw/char/renesas_sci.c
create mode 100644 hw/intc/rx_icu.c
create mode 100644 hw/rx/rx62n.c
create mode 100644 hw/rx/rxqemu.c
create mode 100644 hw/timer/renesas_cmt.c
create mode 100644 hw/timer/renesas_tmr.c
create mode 100644 target/rx/cpu.c
create mode 100644 target/rx/disas.c
create mode 100644 target/rx/gdbstub.c
create mode 100644 target/rx/helper.c
create mode 100644 target/rx/monitor.c
create mode 100644 target/rx/op_helper.c
create mode 100644 target/rx/translate.c
create mode 100644 hw/rx/Kconfig
create mode 100644 hw/rx/Makefile.objs
create mode 100644 target/rx/Makefile.objs
create mode 100644 target/rx/insns.decode
--
2.11.0
next reply other threads:[~2019-05-06 13:17 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-06 13:14 Yoshinori Sato [this message]
2019-05-06 13:14 ` [Qemu-devel] [PATCH v9 01/13] target/rx: TCG translation Yoshinori Sato
2019-05-06 13:14 ` [Qemu-devel] [PATCH v9 02/13] target/rx: TCG helper Yoshinori Sato
2019-05-06 13:14 ` [Qemu-devel] [PATCH v9 03/13] target/rx: CPU definition Yoshinori Sato
2019-05-06 13:14 ` [Qemu-devel] [PATCH v9 04/13] target/rx: RX disassembler Yoshinori Sato
2019-05-06 13:14 ` [Qemu-devel] [PATCH v9 05/13] target/rx: Miscellaneous files Yoshinori Sato
2019-05-06 13:14 ` [Qemu-devel] [PATCH v9 06/13] hw/intc: RX62N interrupt controller (ICUa) Yoshinori Sato
2019-05-06 13:14 ` [Qemu-devel] [PATCH v9 07/13] hw/timer: RX62N internal timer modules Yoshinori Sato
2019-05-06 13:14 ` [Qemu-devel] [PATCH v9 08/13] hw/char: RX62N serial communication interface (SCI) Yoshinori Sato
2019-05-06 13:14 ` [Qemu-devel] [PATCH v9 09/13] hw/rx: RX Target hardware definition Yoshinori Sato
2019-05-06 13:14 ` [Qemu-devel] [PATCH v9 10/13] Add rx-softmmu Yoshinori Sato
2019-05-06 13:14 ` [Qemu-devel] [PATCH v9 11/13] MAINTAINERS: Add RX Yoshinori Sato
2019-05-06 13:14 ` [Qemu-devel] [PATCH v9 12/13] hw/registerfields.h: Add 8bit and 16bit register macros Yoshinori Sato
2019-05-06 13:14 ` [Qemu-devel] [PATCH v9 13/13] qemu/bitops.h: Add extract8 and extract16 Yoshinori Sato
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