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From: David Gibson <david@gibson.dropbear.id.au>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v3 16/27] target/ppc: Convert to CPUClass::tlb_fill
Date: Fri, 10 May 2019 11:39:29 +1000	[thread overview]
Message-ID: <20190510013929.GX7073@umbus.fritz.box> (raw)
In-Reply-To: <20190509222631.14271-17-richard.henderson@linaro.org>

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On Thu, May 09, 2019 at 03:26:20PM -0700, Richard Henderson wrote:
> Cc: qemu-ppc@nongnu.org
> Cc: David Gibson <david@gibson.dropbear.id.au>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Acked-by: David Gibson <david@gibson.dropbear.id.au>

> ---
>  target/ppc/cpu.h                |  7 +++----
>  target/ppc/mmu_helper.c         | 22 +++++++++++++---------
>  target/ppc/translate_init.inc.c |  5 ++---
>  target/ppc/user_only_helper.c   | 14 ++++++++------
>  4 files changed, 26 insertions(+), 22 deletions(-)
> 
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 5e7cf54b2f..d7f23ad5e0 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -1311,10 +1311,9 @@ void ppc_translate_init(void);
>   * is returned if the signal was handled by the virtual CPU.
>   */
>  int cpu_ppc_signal_handler(int host_signum, void *pinfo, void *puc);
> -#if defined(CONFIG_USER_ONLY)
> -int ppc_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw,
> -                             int mmu_idx);
> -#endif
> +bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> +                      MMUAccessType access_type, int mmu_idx,
> +                      bool probe, uintptr_t retaddr);
>  
>  #if !defined(CONFIG_USER_ONLY)
>  void ppc_store_sdr1(CPUPPCState *env, target_ulong value);
> diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
> index 1dbc9acb75..afcca50530 100644
> --- a/target/ppc/mmu_helper.c
> +++ b/target/ppc/mmu_helper.c
> @@ -3057,15 +3057,9 @@ void helper_check_tlb_flush_global(CPUPPCState *env)
>  
>  /*****************************************************************************/
>  
> -/*
> - * try to fill the TLB and return an exception if error. If retaddr is
> - * NULL, it means that the function was called in C code (i.e. not
> - * from generated code or from helper.c)
> - *
> - * XXX: fix it to restore all registers
> - */
> -void tlb_fill(CPUState *cs, target_ulong addr, int size,
> -              MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
> +bool ppc_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
> +                      MMUAccessType access_type, int mmu_idx,
> +                      bool probe, uintptr_t retaddr)
>  {
>      PowerPCCPU *cpu = POWERPC_CPU(cs);
>      PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
> @@ -3078,7 +3072,17 @@ void tlb_fill(CPUState *cs, target_ulong addr, int size,
>          ret = cpu_ppc_handle_mmu_fault(env, addr, access_type, mmu_idx);
>      }
>      if (unlikely(ret != 0)) {
> +        if (probe) {
> +            return false;
> +        }
>          raise_exception_err_ra(env, cs->exception_index, env->error_code,
>                                 retaddr);
>      }
> +    return true;
> +}
> +
> +void tlb_fill(CPUState *cs, target_ulong addr, int size,
> +              MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
> +{
> +    ppc_cpu_tlb_fill(cs, addr, size, access_type, mmu_idx, false, retaddr);
>  }
> diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
> index 0394a9ddad..3f847de36c 100644
> --- a/target/ppc/translate_init.inc.c
> +++ b/target/ppc/translate_init.inc.c
> @@ -10592,9 +10592,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
>      cc->gdb_read_register = ppc_cpu_gdb_read_register;
>      cc->gdb_write_register = ppc_cpu_gdb_write_register;
>      cc->do_unaligned_access = ppc_cpu_do_unaligned_access;
> -#ifdef CONFIG_USER_ONLY
> -    cc->handle_mmu_fault = ppc_cpu_handle_mmu_fault;
> -#else
> +    cc->tlb_fill = ppc_cpu_tlb_fill;
> +#ifndef CONFIG_USER_ONLY
>      cc->get_phys_page_debug = ppc_cpu_get_phys_page_debug;
>      cc->vmsd = &vmstate_ppc_cpu;
>  #endif
> diff --git a/target/ppc/user_only_helper.c b/target/ppc/user_only_helper.c
> index 2f1477f102..683c03390d 100644
> --- a/target/ppc/user_only_helper.c
> +++ b/target/ppc/user_only_helper.c
> @@ -20,21 +20,24 @@
>  
>  #include "qemu/osdep.h"
>  #include "cpu.h"
> +#include "exec/exec-all.h"
>  
> -int ppc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
> -                             int mmu_idx)
> +
> +bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> +                      MMUAccessType access_type, int mmu_idx,
> +                      bool probe, uintptr_t retaddr)
>  {
>      PowerPCCPU *cpu = POWERPC_CPU(cs);
>      CPUPPCState *env = &cpu->env;
>      int exception, error_code;
>  
> -    if (rw == 2) {
> +    if (access_type == MMU_INST_FETCH) {
>          exception = POWERPC_EXCP_ISI;
>          error_code = 0x40000000;
>      } else {
>          exception = POWERPC_EXCP_DSI;
>          error_code = 0x40000000;
> -        if (rw) {
> +        if (access_type == MMU_DATA_STORE) {
>              error_code |= 0x02000000;
>          }
>          env->spr[SPR_DAR] = address;
> @@ -42,6 +45,5 @@ int ppc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
>      }
>      cs->exception_index = exception;
>      env->error_code = error_code;
> -
> -    return 1;
> +    cpu_loop_exit_restore(cs, retaddr);
>  }

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2019-05-10  3:00 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-09 22:26 [Qemu-devel] [PATCH v3 00/27] tcg: Add CPUClass::tlb_fill Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 01/27] " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 02/27] target/alpha: Convert to CPUClass::tlb_fill Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 03/27] target/arm: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 04/27] target/cris: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 05/27] target/hppa: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 06/27] target/i386: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 07/27] target/lm32: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 08/27] target/m68k: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 09/27] target/microblaze: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 10/27] target/mips: Pass a valid error to raise_mmu_exception for user-only Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 11/27] target/mips: Tidy control flow in mips_cpu_handle_mmu_fault Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 12/27] target/mips: Convert to CPUClass::tlb_fill Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 13/27] target/moxie: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 14/27] target/nios2: " Richard Henderson
2019-05-10  8:58   ` Peter Maydell
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 15/27] target/openrisc: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 16/27] target/ppc: " Richard Henderson
2019-05-10  1:39   ` David Gibson [this message]
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 17/27] target/riscv: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 18/27] target/s390x: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 19/27] target/sh4: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 20/27] target/sparc: " Richard Henderson
2019-05-10  9:55   ` Peter Maydell
2019-05-10  9:57     ` Peter Maydell
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 21/27] target/tilegx: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 22/27] target/tricore: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 23/27] target/unicore32: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 24/27] target/xtensa: " Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 25/27] tcg: Use CPUClass::tlb_fill in cputlb.c Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 26/27] tcg: Remove CPUClass::handle_mmu_fault Richard Henderson
2019-05-09 22:26 ` [Qemu-devel] [PATCH v3 27/27] tcg: Use tlb_fill probe from tlb_vaddr_to_host Richard Henderson

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