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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Anthony Green <green@moxielogic.com>
Subject: [Qemu-devel] [PULL 13/27] target/moxie: Convert to CPUClass::tlb_fill
Date: Fri, 10 May 2019 08:19:30 -0700	[thread overview]
Message-ID: <20190510151944.22981-14-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190510151944.22981-1-richard.henderson@linaro.org>

Remove the user-only functions, as we don't have a user-only config.
Fix the unconditional call to tlb_set_page, even if the translation
failed.

Cc: Anthony Green <green@moxielogic.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/moxie/cpu.h    |  5 ++--
 target/moxie/cpu.c    |  5 ++--
 target/moxie/helper.c | 61 ++++++++++---------------------------------
 3 files changed, 19 insertions(+), 52 deletions(-)

diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h
index f3b6d83ae7..a63a96bc05 100644
--- a/target/moxie/cpu.h
+++ b/target/moxie/cpu.h
@@ -139,7 +139,8 @@ static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
     *flags = 0;
 }
 
-int moxie_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size,
-                               int rw, int mmu_idx);
+bool moxie_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
+                        MMUAccessType access_type, int mmu_idx,
+                        bool probe, uintptr_t retaddr);
 
 #endif /* MOXIE_CPU_H */
diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
index 46434e65ba..02b2b47574 100644
--- a/target/moxie/cpu.c
+++ b/target/moxie/cpu.c
@@ -112,9 +112,8 @@ static void moxie_cpu_class_init(ObjectClass *oc, void *data)
     cc->do_interrupt = moxie_cpu_do_interrupt;
     cc->dump_state = moxie_cpu_dump_state;
     cc->set_pc = moxie_cpu_set_pc;
-#ifdef CONFIG_USER_ONLY
-    cc->handle_mmu_fault = moxie_cpu_handle_mmu_fault;
-#else
+    cc->tlb_fill = moxie_cpu_tlb_fill;
+#ifndef CONFIG_USER_ONLY
     cc->get_phys_page_debug = moxie_cpu_get_phys_page_debug;
     cc->vmsd = &vmstate_moxie_cpu;
 #endif
diff --git a/target/moxie/helper.c b/target/moxie/helper.c
index 287a45232c..216cef057e 100644
--- a/target/moxie/helper.c
+++ b/target/moxie/helper.c
@@ -26,18 +26,10 @@
 #include "qemu/host-utils.h"
 #include "exec/helper-proto.h"
 
-/* Try to fill the TLB and return an exception if error. If retaddr is
-   NULL, it means that the function was called in C code (i.e. not
-   from generated code or from helper.c) */
 void tlb_fill(CPUState *cs, target_ulong addr, int size,
               MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
 {
-    int ret;
-
-    ret = moxie_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx);
-    if (unlikely(ret)) {
-        cpu_loop_exit_restore(cs, retaddr);
-    }
+    moxie_cpu_tlb_fill(cs, addr, size, access_type, mmu_idx, false, retaddr);
 }
 
 void helper_raise_exception(CPUMoxieState *env, int ex)
@@ -85,53 +77,29 @@ void helper_debug(CPUMoxieState *env)
     cpu_loop_exit(cs);
 }
 
-#if defined(CONFIG_USER_ONLY)
-
-void moxie_cpu_do_interrupt(CPUState *cs)
-{
-    CPUState *cs = CPU(moxie_env_get_cpu(env));
-
-    cs->exception_index = -1;
-}
-
-int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size,
-                               int rw, int mmu_idx)
-{
-    MoxieCPU *cpu = MOXIE_CPU(cs);
-
-    cs->exception_index = 0xaa;
-    cpu->env.debug1 = address;
-    cpu_dump_state(cs, stderr, 0);
-    return 1;
-}
-
-#else /* !CONFIG_USER_ONLY */
-
-int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size,
-                               int rw, int mmu_idx)
+bool moxie_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
+                        MMUAccessType access_type, int mmu_idx,
+                        bool probe, uintptr_t retaddr)
 {
     MoxieCPU *cpu = MOXIE_CPU(cs);
     CPUMoxieState *env = &cpu->env;
     MoxieMMUResult res;
     int prot, miss;
-    target_ulong phy;
-    int r = 1;
 
     address &= TARGET_PAGE_MASK;
     prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
-    miss = moxie_mmu_translate(&res, env, address, rw, mmu_idx);
-    if (miss) {
-        /* handle the miss.  */
-        phy = 0;
-        cs->exception_index = MOXIE_EX_MMU_MISS;
-    } else {
-        phy = res.phy;
-        r = 0;
+    miss = moxie_mmu_translate(&res, env, address, access_type, mmu_idx);
+    if (likely(!miss)) {
+        tlb_set_page(cs, address, res.phy, prot, mmu_idx, TARGET_PAGE_SIZE);
+        return true;
+    }
+    if (probe) {
+        return false;
     }
-    tlb_set_page(cs, address, phy, prot, mmu_idx, TARGET_PAGE_SIZE);
-    return r;
-}
 
+    cs->exception_index = MOXIE_EX_MMU_MISS;
+    cpu_loop_exit_restore(cs, retaddr);
+}
 
 void moxie_cpu_do_interrupt(CPUState *cs)
 {
@@ -156,4 +124,3 @@ hwaddr moxie_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
     }
     return phy;
 }
-#endif
-- 
2.17.1



  parent reply	other threads:[~2019-05-10 15:31 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-10 15:19 [Qemu-devel] [PULL 00/27] tcg: Add CPUClass::tlb_fill Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 01/27] " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 02/27] target/alpha: Convert to CPUClass::tlb_fill Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 03/27] target/arm: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 04/27] target/cris: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 05/27] target/hppa: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 06/27] target/i386: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 07/27] target/lm32: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 08/27] target/m68k: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 09/27] target/microblaze: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 10/27] target/mips: Pass a valid error to raise_mmu_exception for user-only Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 11/27] target/mips: Tidy control flow in mips_cpu_handle_mmu_fault Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 12/27] target/mips: Convert to CPUClass::tlb_fill Richard Henderson
2019-05-10 15:19 ` Richard Henderson [this message]
2019-05-10 15:19 ` [Qemu-devel] [PULL 14/27] target/nios2: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 15/27] target/openrisc: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 16/27] target/ppc: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 17/27] target/riscv: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 18/27] target/s390x: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 19/27] target/sh4: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 20/27] target/sparc: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 21/27] target/tilegx: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 22/27] target/tricore: " Richard Henderson
2021-01-27 19:47   ` Philippe Mathieu-Daudé
2019-05-10 15:19 ` [Qemu-devel] [PULL 23/27] target/unicore32: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 24/27] target/xtensa: " Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 25/27] tcg: Use CPUClass::tlb_fill in cputlb.c Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 26/27] tcg: Remove CPUClass::handle_mmu_fault Richard Henderson
2019-05-10 15:19 ` [Qemu-devel] [PULL 27/27] tcg: Use tlb_fill probe from tlb_vaddr_to_host Richard Henderson
2019-05-10 17:44 ` [Qemu-devel] [PULL 00/27] tcg: Add CPUClass::tlb_fill Peter Maydell

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