From: David Hildenbrand <david@redhat.com>
To: qemu-devel@nongnu.org
Cc: Thomas Huth <thuth@redhat.com>,
David Hildenbrand <david@redhat.com>,
Cornelia Huck <cohuck@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
qemu-s390x@nongnu.org, Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PULL SUBSYSTEM s390x 14/40] s390x/tcg: Implement VECTOR GALOIS FIELD MULTIPLY SUM (AND ACCUMULATE)
Date: Fri, 17 May 2019 12:21:19 +0200 [thread overview]
Message-ID: <20190517102145.21812-15-david@redhat.com> (raw)
In-Reply-To: <20190517102145.21812-1-david@redhat.com>
A galois field multiplication in field 2 is like binary multiplication,
however instead of doing ordinary binary additions, xor's are performed.
So no carries are considered.
Implement all variants via helpers. s390_vec_sar() and s390_vec_shr()
will be reused later on.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
---
target/s390x/helper.h | 8 ++
target/s390x/insn-data.def | 4 +
target/s390x/translate_vx.inc.c | 38 ++++++++
target/s390x/vec_int_helper.c | 167 ++++++++++++++++++++++++++++++++
4 files changed, 217 insertions(+)
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index 60b8bd3c43..6e6ba9bf32 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -154,6 +154,14 @@ DEF_HELPER_FLAGS_3(gvec_vclz8, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
DEF_HELPER_FLAGS_3(gvec_vclz16, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
DEF_HELPER_FLAGS_3(gvec_vctz8, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
DEF_HELPER_FLAGS_3(gvec_vctz16, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
+DEF_HELPER_FLAGS_4(gvec_vgfm8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_4(gvec_vgfm16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_4(gvec_vgfm32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_4(gvec_vgfm64, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vgfma8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vgfma16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vgfma32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vgfma64, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
#ifndef CONFIG_USER_ONLY
DEF_HELPER_3(servc, i32, env, i64, i64)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index b8400c191a..add174b793 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -1090,6 +1090,10 @@
F(0xe752, VCTZ, VRR_a, V, 0, 0, 0, 0, vctz, 0, IF_VEC)
/* VECTOR EXCLUSIVE OR */
F(0xe76d, VX, VRR_c, V, 0, 0, 0, 0, vx, 0, IF_VEC)
+/* VECTOR GALOIS FIELD MULTIPLY SUM */
+ F(0xe7b4, VGFM, VRR_c, V, 0, 0, 0, 0, vgfm, 0, IF_VEC)
+/* VECTOR GALOIS FIELD MULTIPLY SUM AND ACCUMULATE */
+ F(0xe7bc, VGFMA, VRR_d, V, 0, 0, 0, 0, vgfma, 0, IF_VEC)
#ifndef CONFIG_USER_ONLY
/* COMPARE AND SWAP AND PURGE */
diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
index 0935857eff..1db5d6d152 100644
--- a/target/s390x/translate_vx.inc.c
+++ b/target/s390x/translate_vx.inc.c
@@ -1483,3 +1483,41 @@ static DisasJumpType op_vx(DisasContext *s, DisasOps *o)
get_field(s->fields, v3));
return DISAS_NEXT;
}
+
+static DisasJumpType op_vgfm(DisasContext *s, DisasOps *o)
+{
+ const uint8_t es = get_field(s->fields, m4);
+ static const GVecGen3 g[4] = {
+ { .fno = gen_helper_gvec_vgfm8, },
+ { .fno = gen_helper_gvec_vgfm16, },
+ { .fno = gen_helper_gvec_vgfm32, },
+ { .fno = gen_helper_gvec_vgfm64, },
+ };
+
+ if (es > ES_64) {
+ gen_program_exception(s, PGM_SPECIFICATION);
+ return DISAS_NORETURN;
+ }
+ gen_gvec_3(get_field(s->fields, v1), get_field(s->fields, v2),
+ get_field(s->fields, v3), &g[es]);
+ return DISAS_NEXT;
+}
+
+static DisasJumpType op_vgfma(DisasContext *s, DisasOps *o)
+{
+ const uint8_t es = get_field(s->fields, m5);
+ static const GVecGen4 g[4] = {
+ { .fno = gen_helper_gvec_vgfma8, },
+ { .fno = gen_helper_gvec_vgfma16, },
+ { .fno = gen_helper_gvec_vgfma32, },
+ { .fno = gen_helper_gvec_vgfma64, },
+ };
+
+ if (es > ES_64) {
+ gen_program_exception(s, PGM_SPECIFICATION);
+ return DISAS_NORETURN;
+ }
+ gen_gvec_4(get_field(s->fields, v1), get_field(s->fields, v2),
+ get_field(s->fields, v3), get_field(s->fields, v4), &g[es]);
+ return DISAS_NEXT;
+}
diff --git a/target/s390x/vec_int_helper.c b/target/s390x/vec_int_helper.c
index d1b1f28509..20a1034dd8 100644
--- a/target/s390x/vec_int_helper.c
+++ b/target/s390x/vec_int_helper.c
@@ -15,6 +15,59 @@
#include "vec.h"
#include "exec/helper-proto.h"
+static bool s390_vec_is_zero(const S390Vector *v)
+{
+ return !v->doubleword[0] && !v->doubleword[1];
+}
+
+static void s390_vec_xor(S390Vector *res, const S390Vector *a,
+ const S390Vector *b)
+{
+ res->doubleword[0] = a->doubleword[0] ^ b->doubleword[0];
+ res->doubleword[1] = a->doubleword[1] ^ b->doubleword[1];
+}
+
+static void s390_vec_shl(S390Vector *d, const S390Vector *a, uint64_t count)
+{
+ uint64_t tmp;
+
+ g_assert(count < 128);
+ if (count == 0) {
+ d->doubleword[0] = a->doubleword[0];
+ d->doubleword[1] = a->doubleword[1];
+ } else if (count == 64) {
+ d->doubleword[0] = a->doubleword[1];
+ d->doubleword[1] = 0;
+ } else if (count < 64) {
+ tmp = extract64(a->doubleword[1], 64 - count, count);
+ d->doubleword[1] = a->doubleword[1] << count;
+ d->doubleword[0] = (a->doubleword[0] << count) | tmp;
+ } else {
+ d->doubleword[0] = a->doubleword[1] << (count - 64);
+ d->doubleword[1] = 0;
+ }
+}
+
+static void s390_vec_shr(S390Vector *d, const S390Vector *a, uint64_t count)
+{
+ uint64_t tmp;
+
+ g_assert(count < 128);
+ if (count == 0) {
+ d->doubleword[0] = a->doubleword[0];
+ d->doubleword[1] = a->doubleword[1];
+ } else if (count == 64) {
+ d->doubleword[1] = a->doubleword[0];
+ d->doubleword[0] = 0;
+ } else if (count < 64) {
+ tmp = a->doubleword[1] >> count;
+ d->doubleword[1] = deposit64(tmp, 64 - count, count, a->doubleword[0]);
+ d->doubleword[0] = a->doubleword[0] >> count;
+ } else {
+ d->doubleword[1] = a->doubleword[0] >> (count - 64);
+ d->doubleword[0] = 0;
+ }
+}
#define DEF_VAVG(BITS) \
void HELPER(gvec_vavg##BITS)(void *v1, const void *v2, const void *v3, \
uint32_t desc) \
@@ -74,3 +127,117 @@ void HELPER(gvec_vctz##BITS)(void *v1, const void *v2, uint32_t desc) \
}
DEF_VCTZ(8)
DEF_VCTZ(16)
+
+/* like binary multiplication, but XOR instead of addition */
+#define DEF_GALOIS_MULTIPLY(BITS, TBITS) \
+static uint##TBITS##_t galois_multiply##BITS(uint##TBITS##_t a, \
+ uint##TBITS##_t b) \
+{ \
+ uint##TBITS##_t res = 0; \
+ \
+ while (b) { \
+ if (b & 0x1) { \
+ res = res ^ a; \
+ } \
+ a = a << 1; \
+ b = b >> 1; \
+ } \
+ return res; \
+}
+DEF_GALOIS_MULTIPLY(8, 16)
+DEF_GALOIS_MULTIPLY(16, 32)
+DEF_GALOIS_MULTIPLY(32, 64)
+
+static S390Vector galois_multiply64(uint64_t a, uint64_t b)
+{
+ S390Vector res = {};
+ S390Vector va = {
+ .doubleword[1] = a,
+ };
+ S390Vector vb = {
+ .doubleword[1] = b,
+ };
+
+ while (!s390_vec_is_zero(&vb)) {
+ if (vb.doubleword[1] & 0x1) {
+ s390_vec_xor(&res, &res, &va);
+ }
+ s390_vec_shl(&va, &va, 1);
+ s390_vec_shr(&vb, &vb, 1);
+ }
+ return res;
+}
+
+#define DEF_VGFM(BITS, TBITS) \
+void HELPER(gvec_vgfm##BITS)(void *v1, const void *v2, const void *v3, \
+ uint32_t desc) \
+{ \
+ int i; \
+ \
+ for (i = 0; i < (128 / TBITS); i++) { \
+ uint##BITS##_t a = s390_vec_read_element##BITS(v2, i * 2); \
+ uint##BITS##_t b = s390_vec_read_element##BITS(v3, i * 2); \
+ uint##TBITS##_t d = galois_multiply##BITS(a, b); \
+ \
+ a = s390_vec_read_element##BITS(v2, i * 2 + 1); \
+ b = s390_vec_read_element##BITS(v3, i * 2 + 1); \
+ d = d ^ galois_multiply32(a, b); \
+ s390_vec_write_element##TBITS(v1, i, d); \
+ } \
+}
+DEF_VGFM(8, 16)
+DEF_VGFM(16, 32)
+DEF_VGFM(32, 64)
+
+void HELPER(gvec_vgfm64)(void *v1, const void *v2, const void *v3,
+ uint32_t desc)
+{
+ S390Vector tmp1, tmp2;
+ uint64_t a, b;
+
+ a = s390_vec_read_element64(v2, 0);
+ b = s390_vec_read_element64(v3, 0);
+ tmp1 = galois_multiply64(a, b);
+ a = s390_vec_read_element64(v2, 1);
+ b = s390_vec_read_element64(v3, 1);
+ tmp2 = galois_multiply64(a, b);
+ s390_vec_xor(v1, &tmp1, &tmp2);
+}
+
+#define DEF_VGFMA(BITS, TBITS) \
+void HELPER(gvec_vgfma##BITS)(void *v1, const void *v2, const void *v3, \
+ const void *v4, uint32_t desc) \
+{ \
+ int i; \
+ \
+ for (i = 0; i < (128 / TBITS); i++) { \
+ uint##BITS##_t a = s390_vec_read_element##BITS(v2, i * 2); \
+ uint##BITS##_t b = s390_vec_read_element##BITS(v3, i * 2); \
+ uint##TBITS##_t d = galois_multiply##BITS(a, b); \
+ \
+ a = s390_vec_read_element##BITS(v2, i * 2 + 1); \
+ b = s390_vec_read_element##BITS(v3, i * 2 + 1); \
+ d = d ^ galois_multiply32(a, b); \
+ d = d ^ s390_vec_read_element##TBITS(v4, i); \
+ s390_vec_write_element##TBITS(v1, i, d); \
+ } \
+}
+DEF_VGFMA(8, 16)
+DEF_VGFMA(16, 32)
+DEF_VGFMA(32, 64)
+
+void HELPER(gvec_vgfma64)(void *v1, const void *v2, const void *v3,
+ const void *v4, uint32_t desc)
+{
+ S390Vector tmp1, tmp2;
+ uint64_t a, b;
+
+ a = s390_vec_read_element64(v2, 0);
+ b = s390_vec_read_element64(v3, 0);
+ tmp1 = galois_multiply64(a, b);
+ a = s390_vec_read_element64(v2, 1);
+ b = s390_vec_read_element64(v3, 1);
+ tmp2 = galois_multiply64(a, b);
+ s390_vec_xor(&tmp1, &tmp1, &tmp2);
+ s390_vec_xor(v1, &tmp1, v4);
+}
--
2.20.1
next prev parent reply other threads:[~2019-05-17 10:48 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-17 10:21 [Qemu-devel] [PULL SUBSYSTEM s390x 00/40] s390x/tcg: s390x/tcg: Vector Instruction Support Part 2 David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 01/40] s390x/tcg: Implement VECTOR ADD David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 02/40] s390x/tcg: Implement VECTOR ADD COMPUTE CARRY David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 03/40] s390x/tcg: Implement VECTOR ADD WITH CARRY David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 04/40] s390x/tcg: Implement VECTOR ADD WITH CARRY COMPUTE CARRY David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 05/40] s390x/tcg: Implement VECTOR AND (WITH COMPLEMENT) David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 06/40] s390x/tcg: Implement VECTOR AVERAGE David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 07/40] s390x/tcg: Implement VECTOR AVERAGE LOGICAL David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 08/40] s390x/tcg: Implement VECTOR CHECKSUM David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 09/40] s390x/tcg: Implement VECTOR ELEMENT COMPARE * David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 10/40] s390x/tcg: Implement VECTOR " David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 11/40] s390x/tcg: Implement VECTOR COUNT LEADING ZEROS David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 12/40] s390x/tcg: Implement VECTOR COUNT TRAILING ZEROS David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 13/40] s390x/tcg: Implement VECTOR EXCLUSIVE OR David Hildenbrand
2019-05-17 10:21 ` David Hildenbrand [this message]
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 15/40] s390x/tcg: Implement VECTOR LOAD COMPLEMENT David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 16/40] s390x/tcg: Implement VECTOR LOAD POSITIVE David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 17/40] s390x/tcg: Implement VECTOR (MAXIMUM|MINIMUM) (LOGICAL) David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 18/40] s390x/tcg: Implement VECTOR MULTIPLY AND ADD * David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 19/40] s390x/tcg: Implement VECTOR MULTIPLY * David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 20/40] s390x/tcg: Implement VECTOR NAND David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 21/40] s390x/tcg: Implement VECTOR NOR David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 22/40] s390x/tcg: Implement VECTOR NOT EXCLUSIVE OR David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 23/40] s390x/tcg: Implement VECTOR OR David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 24/40] s390x/tcg: Implement VECTOR OR WITH COMPLEMENT David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 25/40] s390x/tcg: Implement VECTOR POPULATION COUNT David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 26/40] s390x/tcg: Implement VECTOR ELEMENT ROTATE LEFT LOGICAL David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 27/40] s390x/tcg: Implement VECTOR ELEMENT ROTATE AND INSERT UNDER MASK David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 28/40] s390x/tcg: Implement VECTOR ELEMENT SHIFT David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 29/40] s390x/tcg: Implement VECTOR SHIFT LEFT (BY BYTE) David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 30/40] s390x/tcg: Implement VECTOR SHIFT LEFT DOUBLE BY BYTE David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 31/40] s390x/tcg: Implement VECTOR SHIFT RIGHT ARITHMETIC David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 32/40] s390x/tcg: Implement VECTOR SHIFT RIGHT LOGICAL * David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 33/40] s390x/tcg: Implement VECTOR SUBTRACT David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 34/40] s390x/tcg: Implement VECTOR SUBTRACT COMPUTE BORROW INDICATION David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 35/40] s390x/tcg: Implement VECTOR SUBTRACT WITH " David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 36/40] s390x/tcg: Implement VECTOR SUBTRACT WITH BORROW COMPUTE " David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 37/40] s390x/tcg: Implement VECTOR SUM ACROSS DOUBLEWORD David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 38/40] s390x/tcg: Implement VECTOR SUM ACROSS QUADWORD David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 39/40] s390x/tcg: Implement VECTOR SUM ACROSS WORD David Hildenbrand
2019-05-17 10:21 ` [Qemu-devel] [PULL SUBSYSTEM s390x 40/40] s390x/tcg: Implement VECTOR TEST UNDER MASK David Hildenbrand
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