From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 0/4] Disable FPU/DSP for CPU0 on musca-a and mps2-an521
Date: Fri, 17 May 2019 18:40:42 +0100 [thread overview]
Message-ID: <20190517174046.11146-1-peter.maydell@linaro.org> (raw)
The SSE-200 hardware has configurable integration settings which
determine whether its two CPUs have the FPU and DSP:
* CPU0_FPU (default 0)
* CPU0_DSP (default 0)
* CPU1_FPU (default 1)
* CPU1_DSP (default 1)
Similarly, the IoTKit has settings for its single CPU:
* CPU0_FPU (default 1)
* CPU0_DSP (default 1)
Of our four boards that use either the IoTKit or the SSE-200:
* mps2-an505, mps2-an521 and musca-a use the default settings
* musca-b1 enables FPU and DSP on both CPUs
Currently QEMU models all these boards using CPUs with
both FPU and DSP enabled. This means that we are incorrect
for mps2-an521 and musca-a, which should not have FPU or DSP
on CPU0.
This patchset fixes this (fairly minor) inaccuracy by
implementing properties on the CPU to disable the relevant
CPU features and then wiring them up through the armv7m
object and the ARMSSE SoC container object, so that our
IotKit and SSE200 models behave by default the same way as
the hardware default does, and our Musca-B1 board model
forces the FPU/DSP to be present on CPU, as the hardware does.
The 'neon' property is not strictly required for the M-profile
issues described above, but I implemented it on the CPU
object because disable-neon and disable-vfp interact
for A-profile CPUs.
thanks
-- PMM
Peter Maydell (4):
target/arm: Allow VFP and Neon to be disabled via a CPU property
target/arm: Allow M-profile CPUs to disable the DSP extension via CPU
property
hw/arm/armv7m: Forward "vfp" and "dsp" properties to CPU
hw/arm: Correctly disable FPU/DSP for some ARMSSE-based boards
include/hw/arm/armsse.h | 7 ++
include/hw/arm/armv7m.h | 4 +
target/arm/cpu.h | 6 ++
hw/arm/armsse.c | 58 ++++++++++---
hw/arm/armv7m.c | 18 ++++
hw/arm/musca.c | 8 ++
target/arm/cpu.c | 179 ++++++++++++++++++++++++++++++++++++++--
7 files changed, 262 insertions(+), 18 deletions(-)
--
2.20.1
next reply other threads:[~2019-05-17 17:42 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-17 17:40 Peter Maydell [this message]
2019-05-17 17:40 ` [Qemu-devel] [PATCH 1/4] target/arm: Allow VFP and Neon to be disabled via a CPU property Peter Maydell
2019-06-07 13:37 ` Philippe Mathieu-Daudé
2019-06-13 13:30 ` [Qemu-devel] [Qemu-arm] " Alex Bennée
2019-05-17 17:40 ` [Qemu-devel] [PATCH 2/4] target/arm: Allow M-profile CPUs to disable the DSP extension via " Peter Maydell
2019-06-07 13:31 ` Philippe Mathieu-Daudé
2019-06-13 13:32 ` Alex Bennée
2019-05-17 17:40 ` [Qemu-devel] [PATCH 3/4] hw/arm/armv7m: Forward "vfp" and "dsp" properties to CPU Peter Maydell
2019-06-07 13:32 ` Philippe Mathieu-Daudé
2019-06-13 13:33 ` [Qemu-devel] [Qemu-arm] " Alex Bennée
2019-05-17 17:40 ` [Qemu-devel] [PATCH 4/4] hw/arm: Correctly disable FPU/DSP for some ARMSSE-based boards Peter Maydell
2019-06-13 13:39 ` [Qemu-devel] [Qemu-arm] " Alex Bennée
2019-06-13 15:17 ` Peter Maydell
2019-06-07 13:07 ` [Qemu-devel] [PATCH 0/4] Disable FPU/DSP for CPU0 on musca-a and mps2-an521 Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190517174046.11146-1-peter.maydell@linaro.org \
--to=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).