From: Cornelia Huck <cohuck@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-s390x@nongnu.org,
Richard Henderson <richard.henderson@linaro.org>,
qemu-devel@nongnu.org, David Hildenbrand <david@redhat.com>
Subject: [Qemu-devel] [PULL 23/54] s390x/tcg: Implement VECTOR MULTIPLY AND ADD *
Date: Mon, 20 May 2019 19:02:31 +0200 [thread overview]
Message-ID: <20190520170302.13643-24-cohuck@redhat.com> (raw)
In-Reply-To: <20190520170302.13643-1-cohuck@redhat.com>
From: David Hildenbrand <david@redhat.com>
Quite some variants to handle. At least handle some 32-bit element
variants via gvec expansion (we could also handle 16/32-bit variants
for ODD and EVEN easily via gvec expansion, but let's keep it simple
for now).
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
---
target/s390x/helper.h | 18 +++++
target/s390x/insn-data.def | 14 ++++
target/s390x/translate_vx.inc.c | 122 +++++++++++++++++++++++++++++++
target/s390x/vec_int_helper.c | 123 ++++++++++++++++++++++++++++++++
4 files changed, 277 insertions(+)
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index 6e6ba9bf32a2..18f8756d43fa 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -162,6 +162,24 @@ DEF_HELPER_FLAGS_5(gvec_vgfma8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i3
DEF_HELPER_FLAGS_5(gvec_vgfma16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_5(gvec_vgfma32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_5(gvec_vgfma64, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmal8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmal16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmah8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmah16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmalh8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmalh16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmae8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmae16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmae32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmale8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmale16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmale32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmao8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmao16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmao32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmalo8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmalo16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vmalo32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
#ifndef CONFIG_USER_ONLY
DEF_HELPER_3(servc, i32, env, i64, i64)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index b22d9f0f6a27..7ccec0544ffa 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -1106,6 +1106,20 @@
F(0xe7fe, VMN, VRR_c, V, 0, 0, 0, 0, vmx, 0, IF_VEC)
/* VECTOR MINIMUM LOGICAL */
F(0xe7fc, VMNL, VRR_c, V, 0, 0, 0, 0, vmx, 0, IF_VEC)
+/* VECTOR MULTIPLY AND ADD LOW */
+ F(0xe7aa, VMAL, VRR_d, V, 0, 0, 0, 0, vma, 0, IF_VEC)
+/* VECTOR MULTIPLY AND ADD HIGH */
+ F(0xe7ab, VMAH, VRR_d, V, 0, 0, 0, 0, vma, 0, IF_VEC)
+/* VECTOR MULTIPLY AND ADD LOGICAL HIGH */
+ F(0xe7a9, VMALH, VRR_d, V, 0, 0, 0, 0, vma, 0, IF_VEC)
+/* VECTOR MULTIPLY AND ADD EVEN */
+ F(0xe7ae, VMAE, VRR_d, V, 0, 0, 0, 0, vma, 0, IF_VEC)
+/* VECTOR MULTIPLY AND ADD LOGICAL EVEN */
+ F(0xe7ac, VMALE, VRR_d, V, 0, 0, 0, 0, vma, 0, IF_VEC)
+/* VECTOR MULTIPLY AND ADD ODD */
+ F(0xe7af, VMAO, VRR_d, V, 0, 0, 0, 0, vma, 0, IF_VEC)
+/* VECTOR MULTIPLY AND ADD LOGICAL ODD */
+ F(0xe7ad, VMALO, VRR_d, V, 0, 0, 0, 0, vma, 0, IF_VEC)
#ifndef CONFIG_USER_ONLY
/* COMPARE AND SWAP AND PURGE */
diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
index bb27cad4d8e7..7de411f4f6f6 100644
--- a/target/s390x/translate_vx.inc.c
+++ b/target/s390x/translate_vx.inc.c
@@ -1581,3 +1581,125 @@ static DisasJumpType op_vmx(DisasContext *s, DisasOps *o)
}
return DISAS_NEXT;
}
+
+static void gen_mal_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b, TCGv_i32 c)
+{
+ TCGv_i32 t0 = tcg_temp_new_i32();
+
+ tcg_gen_mul_i32(t0, a, b);
+ tcg_gen_add_i32(d, t0, c);
+
+ tcg_temp_free_i32(t0);
+}
+
+static void gen_mah_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b, TCGv_i32 c)
+{
+ TCGv_i64 t0 = tcg_temp_new_i64();
+ TCGv_i64 t1 = tcg_temp_new_i64();
+ TCGv_i64 t2 = tcg_temp_new_i64();
+
+ tcg_gen_ext_i32_i64(t0, a);
+ tcg_gen_ext_i32_i64(t1, b);
+ tcg_gen_ext_i32_i64(t2, c);
+ tcg_gen_mul_i64(t0, t0, t1);
+ tcg_gen_add_i64(t0, t0, t2);
+ tcg_gen_extrh_i64_i32(d, t0);
+
+ tcg_temp_free(t0);
+ tcg_temp_free(t1);
+ tcg_temp_free(t2);
+}
+
+static void gen_malh_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b, TCGv_i32 c)
+{
+ TCGv_i64 t0 = tcg_temp_new_i64();
+ TCGv_i64 t1 = tcg_temp_new_i64();
+ TCGv_i64 t2 = tcg_temp_new_i64();
+
+ tcg_gen_extu_i32_i64(t0, a);
+ tcg_gen_extu_i32_i64(t1, b);
+ tcg_gen_extu_i32_i64(t2, c);
+ tcg_gen_mul_i64(t0, t0, t1);
+ tcg_gen_add_i64(t0, t0, t2);
+ tcg_gen_extrh_i64_i32(d, t0);
+
+ tcg_temp_free(t0);
+ tcg_temp_free(t1);
+ tcg_temp_free(t2);
+}
+
+static DisasJumpType op_vma(DisasContext *s, DisasOps *o)
+{
+ const uint8_t es = get_field(s->fields, m5);
+ static const GVecGen4 g_vmal[3] = {
+ { .fno = gen_helper_gvec_vmal8, },
+ { .fno = gen_helper_gvec_vmal16, },
+ { .fni4 = gen_mal_i32, },
+ };
+ static const GVecGen4 g_vmah[3] = {
+ { .fno = gen_helper_gvec_vmah8, },
+ { .fno = gen_helper_gvec_vmah16, },
+ { .fni4 = gen_mah_i32, },
+ };
+ static const GVecGen4 g_vmalh[3] = {
+ { .fno = gen_helper_gvec_vmalh8, },
+ { .fno = gen_helper_gvec_vmalh16, },
+ { .fni4 = gen_malh_i32, },
+ };
+ static const GVecGen4 g_vmae[3] = {
+ { .fno = gen_helper_gvec_vmae8, },
+ { .fno = gen_helper_gvec_vmae16, },
+ { .fno = gen_helper_gvec_vmae32, },
+ };
+ static const GVecGen4 g_vmale[3] = {
+ { .fno = gen_helper_gvec_vmale8, },
+ { .fno = gen_helper_gvec_vmale16, },
+ { .fno = gen_helper_gvec_vmale32, },
+ };
+ static const GVecGen4 g_vmao[3] = {
+ { .fno = gen_helper_gvec_vmao8, },
+ { .fno = gen_helper_gvec_vmao16, },
+ { .fno = gen_helper_gvec_vmao32, },
+ };
+ static const GVecGen4 g_vmalo[3] = {
+ { .fno = gen_helper_gvec_vmalo8, },
+ { .fno = gen_helper_gvec_vmalo16, },
+ { .fno = gen_helper_gvec_vmalo32, },
+ };
+ const GVecGen4 *fn;
+
+ if (es > ES_32) {
+ gen_program_exception(s, PGM_SPECIFICATION);
+ return DISAS_NORETURN;
+ }
+
+ switch (s->fields->op2) {
+ case 0xaa:
+ fn = &g_vmal[es];
+ break;
+ case 0xab:
+ fn = &g_vmah[es];
+ break;
+ case 0xa9:
+ fn = &g_vmalh[es];
+ break;
+ case 0xae:
+ fn = &g_vmae[es];
+ break;
+ case 0xac:
+ fn = &g_vmale[es];
+ break;
+ case 0xaf:
+ fn = &g_vmao[es];
+ break;
+ case 0xad:
+ fn = &g_vmalo[es];
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ gen_gvec_4(get_field(s->fields, v1), get_field(s->fields, v2),
+ get_field(s->fields, v3), get_field(s->fields, v4), fn);
+ return DISAS_NEXT;
+}
diff --git a/target/s390x/vec_int_helper.c b/target/s390x/vec_int_helper.c
index 20a1034dd83e..171c20fc54f0 100644
--- a/target/s390x/vec_int_helper.c
+++ b/target/s390x/vec_int_helper.c
@@ -241,3 +241,126 @@ void HELPER(gvec_vgfma64)(void *v1, const void *v2, const void *v3,
s390_vec_xor(&tmp1, &tmp1, &tmp2);
s390_vec_xor(v1, &tmp1, v4);
}
+
+#define DEF_VMAL(BITS) \
+void HELPER(gvec_vmal##BITS)(void *v1, const void *v2, const void *v3, \
+ const void *v4, uint32_t desc) \
+{ \
+ int i; \
+ \
+ for (i = 0; i < (128 / BITS); i++) { \
+ const uint##BITS##_t a = s390_vec_read_element##BITS(v2, i); \
+ const uint##BITS##_t b = s390_vec_read_element##BITS(v3, i); \
+ const uint##BITS##_t c = s390_vec_read_element##BITS(v4, i); \
+ \
+ s390_vec_write_element##BITS(v1, i, a * b + c); \
+ } \
+}
+DEF_VMAL(8)
+DEF_VMAL(16)
+
+#define DEF_VMAH(BITS) \
+void HELPER(gvec_vmah##BITS)(void *v1, const void *v2, const void *v3, \
+ const void *v4, uint32_t desc) \
+{ \
+ int i; \
+ \
+ for (i = 0; i < (128 / BITS); i++) { \
+ const int32_t a = (int##BITS##_t)s390_vec_read_element##BITS(v2, i); \
+ const int32_t b = (int##BITS##_t)s390_vec_read_element##BITS(v3, i); \
+ const int32_t c = (int##BITS##_t)s390_vec_read_element##BITS(v4, i); \
+ \
+ s390_vec_write_element##BITS(v1, i, (a * b + c) >> BITS); \
+ } \
+}
+DEF_VMAH(8)
+DEF_VMAH(16)
+
+#define DEF_VMALH(BITS) \
+void HELPER(gvec_vmalh##BITS)(void *v1, const void *v2, const void *v3, \
+ const void *v4, uint32_t desc) \
+{ \
+ int i; \
+ \
+ for (i = 0; i < (128 / BITS); i++) { \
+ const uint##BITS##_t a = s390_vec_read_element##BITS(v2, i); \
+ const uint##BITS##_t b = s390_vec_read_element##BITS(v3, i); \
+ const uint##BITS##_t c = s390_vec_read_element##BITS(v4, i); \
+ \
+ s390_vec_write_element##BITS(v1, i, (a * b + c) >> BITS); \
+ } \
+}
+DEF_VMALH(8)
+DEF_VMALH(16)
+
+#define DEF_VMAE(BITS, TBITS) \
+void HELPER(gvec_vmae##BITS)(void *v1, const void *v2, const void *v3, \
+ const void *v4, uint32_t desc) \
+{ \
+ int i, j; \
+ \
+ for (i = 0, j = 0; i < (128 / TBITS); i++, j += 2) { \
+ int##TBITS##_t a = (int##BITS##_t)s390_vec_read_element##BITS(v2, j); \
+ int##TBITS##_t b = (int##BITS##_t)s390_vec_read_element##BITS(v3, j); \
+ int##TBITS##_t c = (int##BITS##_t)s390_vec_read_element##BITS(v4, j); \
+ \
+ s390_vec_write_element##TBITS(v1, i, a * b + c); \
+ } \
+}
+DEF_VMAE(8, 16)
+DEF_VMAE(16, 32)
+DEF_VMAE(32, 64)
+
+#define DEF_VMALE(BITS, TBITS) \
+void HELPER(gvec_vmale##BITS)(void *v1, const void *v2, const void *v3, \
+ const void *v4, uint32_t desc) \
+{ \
+ int i, j; \
+ \
+ for (i = 0, j = 0; i < (128 / TBITS); i++, j += 2) { \
+ uint##TBITS##_t a = s390_vec_read_element##BITS(v2, j); \
+ uint##TBITS##_t b = s390_vec_read_element##BITS(v3, j); \
+ uint##TBITS##_t c = s390_vec_read_element##BITS(v4, j); \
+ \
+ s390_vec_write_element##TBITS(v1, i, a * b + c); \
+ } \
+}
+DEF_VMALE(8, 16)
+DEF_VMALE(16, 32)
+DEF_VMALE(32, 64)
+
+#define DEF_VMAO(BITS, TBITS) \
+void HELPER(gvec_vmao##BITS)(void *v1, const void *v2, const void *v3, \
+ const void *v4, uint32_t desc) \
+{ \
+ int i, j; \
+ \
+ for (i = 0, j = 1; i < (128 / TBITS); i++, j += 2) { \
+ int##TBITS##_t a = (int##BITS##_t)s390_vec_read_element##BITS(v2, j); \
+ int##TBITS##_t b = (int##BITS##_t)s390_vec_read_element##BITS(v3, j); \
+ int##TBITS##_t c = (int##BITS##_t)s390_vec_read_element##BITS(v4, j); \
+ \
+ s390_vec_write_element##TBITS(v1, i, a * b + c); \
+ } \
+}
+DEF_VMAO(8, 16)
+DEF_VMAO(16, 32)
+DEF_VMAO(32, 64)
+
+#define DEF_VMALO(BITS, TBITS) \
+void HELPER(gvec_vmalo##BITS)(void *v1, const void *v2, const void *v3, \
+ const void *v4, uint32_t desc) \
+{ \
+ int i, j; \
+ \
+ for (i = 0, j = 1; i < (128 / TBITS); i++, j += 2) { \
+ uint##TBITS##_t a = s390_vec_read_element##BITS(v2, j); \
+ uint##TBITS##_t b = s390_vec_read_element##BITS(v3, j); \
+ uint##TBITS##_t c = s390_vec_read_element##BITS(v4, j); \
+ \
+ s390_vec_write_element##TBITS(v1, i, a * b + c); \
+ } \
+}
+DEF_VMALO(8, 16)
+DEF_VMALO(16, 32)
+DEF_VMALO(32, 64)
--
2.20.1
next prev parent reply other threads:[~2019-05-20 17:15 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-20 17:02 [Qemu-devel] [PULL 00/54] s390x update Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 01/54] pc-bios/s390-ccw: Clean up harmless misuse of isdigit() Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 02/54] s390-bios: Skip bootmap signature entries Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 03/54] pc-bios/s390: Update firmware image with "Skip bootmap signature entries" fix Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 04/54] s390/ipl: cast to SCSIDevice directly Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 05/54] s390/css: handle CCW_FLAG_SKIP Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 06/54] s390x/tcg: Implement VECTOR ADD Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 07/54] s390x/tcg: Implement VECTOR ADD COMPUTE CARRY Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 08/54] s390x/tcg: Implement VECTOR ADD WITH CARRY Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 09/54] s390x/tcg: Implement VECTOR ADD WITH CARRY COMPUTE CARRY Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 10/54] s390x/tcg: Implement VECTOR AND (WITH COMPLEMENT) Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 11/54] s390x/tcg: Implement VECTOR AVERAGE Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 12/54] s390x/tcg: Implement VECTOR AVERAGE LOGICAL Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 13/54] s390x/tcg: Implement VECTOR CHECKSUM Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 14/54] s390x/tcg: Implement VECTOR ELEMENT COMPARE * Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 15/54] s390x/tcg: Implement VECTOR " Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 16/54] s390x/tcg: Implement VECTOR COUNT LEADING ZEROS Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 17/54] s390x/tcg: Implement VECTOR COUNT TRAILING ZEROS Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 18/54] s390x/tcg: Implement VECTOR EXCLUSIVE OR Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 19/54] s390x/tcg: Implement VECTOR GALOIS FIELD MULTIPLY SUM (AND ACCUMULATE) Cornelia Huck
2019-05-30 11:22 ` Peter Maydell
2019-05-31 9:45 ` David Hildenbrand
2019-05-31 11:32 ` David Hildenbrand
2019-05-31 12:18 ` Richard Henderson
2019-05-20 17:02 ` [Qemu-devel] [PULL 20/54] s390x/tcg: Implement VECTOR LOAD COMPLEMENT Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 21/54] s390x/tcg: Implement VECTOR LOAD POSITIVE Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 22/54] s390x/tcg: Implement VECTOR (MAXIMUM|MINIMUM) (LOGICAL) Cornelia Huck
2019-05-20 17:02 ` Cornelia Huck [this message]
2019-05-20 17:02 ` [Qemu-devel] [PULL 24/54] s390x/tcg: Implement VECTOR MULTIPLY * Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 25/54] s390x/tcg: Implement VECTOR NAND Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 26/54] s390x/tcg: Implement VECTOR NOR Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 27/54] s390x/tcg: Implement VECTOR NOT EXCLUSIVE OR Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 28/54] s390x/tcg: Implement VECTOR OR Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 29/54] s390x/tcg: Implement VECTOR OR WITH COMPLEMENT Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 30/54] s390x/tcg: Implement VECTOR POPULATION COUNT Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 31/54] s390x/tcg: Implement VECTOR ELEMENT ROTATE LEFT LOGICAL Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 32/54] s390x/tcg: Implement VECTOR ELEMENT ROTATE AND INSERT UNDER MASK Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 33/54] s390x/tcg: Implement VECTOR ELEMENT SHIFT Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 34/54] s390x/tcg: Implement VECTOR SHIFT LEFT (BY BYTE) Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 35/54] s390x/tcg: Implement VECTOR SHIFT LEFT DOUBLE BY BYTE Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 36/54] s390x/tcg: Implement VECTOR SHIFT RIGHT ARITHMETIC Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 37/54] s390x/tcg: Implement VECTOR SHIFT RIGHT LOGICAL * Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 38/54] s390x/tcg: Implement VECTOR SUBTRACT Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 39/54] s390x/tcg: Implement VECTOR SUBTRACT COMPUTE BORROW INDICATION Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 40/54] s390x/tcg: Implement VECTOR SUBTRACT WITH " Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 41/54] s390x/tcg: Implement VECTOR SUBTRACT WITH BORROW COMPUTE " Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 42/54] s390x/tcg: Implement VECTOR SUM ACROSS DOUBLEWORD Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 43/54] s390x/tcg: Implement VECTOR SUM ACROSS QUADWORD Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 44/54] s390x/tcg: Implement VECTOR SUM ACROSS WORD Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 45/54] s390x/tcg: Implement VECTOR TEST UNDER MASK Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 46/54] linux headers: update against Linux 5.2-rc1 Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 47/54] s390x/cpumodel: ignore csske for expansion Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 48/54] s390x/cpumodel: Miscellaneous-Instruction-Extensions Facility 3 Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 49/54] s390x/cpumodel: msa9 facility Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 50/54] s390x/cpumodel: vector enhancements Cornelia Huck
2019-05-20 17:02 ` [Qemu-devel] [PULL 51/54] s390x/cpumodel: enhanced sort facility Cornelia Huck
2019-05-20 17:03 ` [Qemu-devel] [PULL 52/54] s390x/cpumodel: add Deflate-conversion facility Cornelia Huck
2019-05-20 17:03 ` [Qemu-devel] [PULL 53/54] s390x/cpumodel: add gen15 defintions Cornelia Huck
2019-05-20 17:03 ` [Qemu-devel] [PULL 54/54] s390x/cpumodel: wire up 8561 and 8562 as gen15 machines Cornelia Huck
2019-05-20 17:30 ` [Qemu-devel] [PULL 00/54] s390x update Peter Maydell
2019-05-20 19:00 ` Cornelia Huck
2019-05-21 7:20 ` [Qemu-devel] [qemu-s390x] " Christian Borntraeger
2019-05-21 8:39 ` Cornelia Huck
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190520170302.13643-24-cohuck@redhat.com \
--to=cohuck@redhat.com \
--cc=david@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-s390x@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).