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From: Wei Yang <richardw.yang@linux.intel.com>
To: qemu-devel@nongnu.org, qemu-arm@nongnu.org
Cc: yang.zhong@intel.com, peter.maydell@linaro.org, thuth@redhat.com,
	mst@redhat.com, shannon.zhaosl@gmail.com,
	Wei Yang <richardw.yang@linux.intel.com>,
	imammedo@redhat.com, philmd@redhat.com
Subject: [Qemu-devel] [PATCH v6 2/2] acpi: pci: use build_append_foo() API to construct MCFG
Date: Tue, 21 May 2019 14:28:36 +0800	[thread overview]
Message-ID: <20190521062836.6541-3-richardw.yang@linux.intel.com> (raw)
In-Reply-To: <20190521062836.6541-1-richardw.yang@linux.intel.com>

build_append_foo() API doesn't need explicit endianness conversions
which eliminates a source of errors and it makes build_mcfg() look like
declarative definition of MCFG table in ACPI spec, which makes it easy
to review.

Signed-off-by: Wei Yang <richardw.yang@linux.intel.com>
Suggested-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>

v3:
   * add some comment on the Configuration Space base address allocation
     structure
v2:
   * miss the reserved[8] of MCFG in last version, add it back
   * drop SOBs and make sure bios-tables-test all OK
---
 hw/acpi/pci.c               | 39 +++++++++++++++++++++++++------------
 include/hw/acpi/acpi-defs.h | 18 -----------------
 2 files changed, 27 insertions(+), 30 deletions(-)

diff --git a/hw/acpi/pci.c b/hw/acpi/pci.c
index fa0fa30bb9..9510597a19 100644
--- a/hw/acpi/pci.c
+++ b/hw/acpi/pci.c
@@ -30,17 +30,32 @@
 
 void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info)
 {
-    AcpiTableMcfg *mcfg;
-    int len = sizeof(*mcfg) + sizeof(mcfg->allocation[0]);
-
-    mcfg = acpi_data_push(table_data, len);
-    mcfg->allocation[0].address = cpu_to_le64(info->base);
-
-    /* Only a single allocation so no need to play with segments */
-    mcfg->allocation[0].pci_segment = cpu_to_le16(0);
-    mcfg->allocation[0].start_bus_number = 0;
-    mcfg->allocation[0].end_bus_number = PCIE_MMCFG_BUS(info->size - 1);
-
-    build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1, NULL, NULL);
+    int mcfg_start = table_data->len;
+
+    /*
+     * PCI Firmware Specification, Revision 3.0
+     * 4.1.2 MCFG Table Description.
+     */
+    acpi_data_push(table_data, sizeof(AcpiTableHeader));
+    /* Reserved */
+    build_append_int_noprefix(table_data, 0, 8);
+
+    /*
+     * Memory Mapped Enhanced Configuration Space Base Address Allocation
+     * Structure
+     */
+    /* Base address, processor-relative */
+    build_append_int_noprefix(table_data, info->base, 8);
+    /* PCI segment group number */
+    build_append_int_noprefix(table_data, 0, 2);
+    /* Starting PCI Bus number */
+    build_append_int_noprefix(table_data, 0, 1);
+    /* Final PCI Bus number */
+    build_append_int_noprefix(table_data, PCIE_MMCFG_BUS(info->size - 1), 1);
+    /* Reserved */
+    build_append_int_noprefix(table_data, 0, 4);
+
+    build_header(linker, table_data, (void *)(table_data->data + mcfg_start),
+                 "MCFG", table_data->len - mcfg_start, 1, NULL, NULL);
 }
 
diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h
index f9aa4bd398..57a3f58b0c 100644
--- a/include/hw/acpi/acpi-defs.h
+++ b/include/hw/acpi/acpi-defs.h
@@ -449,24 +449,6 @@ struct AcpiSratProcessorGiccAffinity {
 
 typedef struct AcpiSratProcessorGiccAffinity AcpiSratProcessorGiccAffinity;
 
-/* PCI fw r3.0 MCFG table. */
-/* Subtable */
-struct AcpiMcfgAllocation {
-    uint64_t address;                /* Base address, processor-relative */
-    uint16_t pci_segment;            /* PCI segment group number */
-    uint8_t start_bus_number;       /* Starting PCI Bus number */
-    uint8_t end_bus_number;         /* Final PCI Bus number */
-    uint32_t reserved;
-} QEMU_PACKED;
-typedef struct AcpiMcfgAllocation AcpiMcfgAllocation;
-
-struct AcpiTableMcfg {
-    ACPI_TABLE_HEADER_DEF;
-    uint8_t reserved[8];
-    AcpiMcfgAllocation allocation[0];
-} QEMU_PACKED;
-typedef struct AcpiTableMcfg AcpiTableMcfg;
-
 /*
  * TCPA Description Table
  *
-- 
2.19.1



WARNING: multiple messages have this Message-ID (diff)
From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Wei Yang <richardw.yang@linux.intel.com>,
	Igor Mammedov <imammedo@redhat.com>
Subject: [Qemu-devel] [PULL 03/10] acpi: pci: use build_append_foo() API to construct MCFG
Date: Wed, 29 May 2019 12:37:19 -0400	[thread overview]
Message-ID: <20190521062836.6541-3-richardw.yang@linux.intel.com> (raw)
Message-ID: <20190529163719.zxExtyWxWql65UKkDzg94AoWP8SO0YeTaNIzMkVUbDQ@z> (raw)
In-Reply-To: <20190529163604.18560-1-mst@redhat.com>

From: Wei Yang <richardw.yang@linux.intel.com>

build_append_foo() API doesn't need explicit endianness conversions
which eliminates a source of errors and it makes build_mcfg() look like
declarative definition of MCFG table in ACPI spec, which makes it easy
to review.

Signed-off-by: Wei Yang <richardw.yang@linux.intel.com>
Suggested-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>

v3:
   * add some comment on the Configuration Space base address allocation
     structure
v2:
   * miss the reserved[8] of MCFG in last version, add it back
   * drop SOBs and make sure bios-tables-test all OK
Message-Id: <20190521062836.6541-3-richardw.yang@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 include/hw/acpi/acpi-defs.h | 18 ------------------
 hw/acpi/pci.c               | 33 ++++++++++++++++++++++++---------
 2 files changed, 24 insertions(+), 27 deletions(-)

diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h
index f9aa4bd398..57a3f58b0c 100644
--- a/include/hw/acpi/acpi-defs.h
+++ b/include/hw/acpi/acpi-defs.h
@@ -449,24 +449,6 @@ struct AcpiSratProcessorGiccAffinity {
 
 typedef struct AcpiSratProcessorGiccAffinity AcpiSratProcessorGiccAffinity;
 
-/* PCI fw r3.0 MCFG table. */
-/* Subtable */
-struct AcpiMcfgAllocation {
-    uint64_t address;                /* Base address, processor-relative */
-    uint16_t pci_segment;            /* PCI segment group number */
-    uint8_t start_bus_number;       /* Starting PCI Bus number */
-    uint8_t end_bus_number;         /* Final PCI Bus number */
-    uint32_t reserved;
-} QEMU_PACKED;
-typedef struct AcpiMcfgAllocation AcpiMcfgAllocation;
-
-struct AcpiTableMcfg {
-    ACPI_TABLE_HEADER_DEF;
-    uint8_t reserved[8];
-    AcpiMcfgAllocation allocation[0];
-} QEMU_PACKED;
-typedef struct AcpiTableMcfg AcpiTableMcfg;
-
 /*
  * TCPA Description Table
  *
diff --git a/hw/acpi/pci.c b/hw/acpi/pci.c
index fa0fa30bb9..9510597a19 100644
--- a/hw/acpi/pci.c
+++ b/hw/acpi/pci.c
@@ -30,17 +30,32 @@
 
 void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info)
 {
-    AcpiTableMcfg *mcfg;
-    int len = sizeof(*mcfg) + sizeof(mcfg->allocation[0]);
+    int mcfg_start = table_data->len;
 
-    mcfg = acpi_data_push(table_data, len);
-    mcfg->allocation[0].address = cpu_to_le64(info->base);
+    /*
+     * PCI Firmware Specification, Revision 3.0
+     * 4.1.2 MCFG Table Description.
+     */
+    acpi_data_push(table_data, sizeof(AcpiTableHeader));
+    /* Reserved */
+    build_append_int_noprefix(table_data, 0, 8);
 
-    /* Only a single allocation so no need to play with segments */
-    mcfg->allocation[0].pci_segment = cpu_to_le16(0);
-    mcfg->allocation[0].start_bus_number = 0;
-    mcfg->allocation[0].end_bus_number = PCIE_MMCFG_BUS(info->size - 1);
+    /*
+     * Memory Mapped Enhanced Configuration Space Base Address Allocation
+     * Structure
+     */
+    /* Base address, processor-relative */
+    build_append_int_noprefix(table_data, info->base, 8);
+    /* PCI segment group number */
+    build_append_int_noprefix(table_data, 0, 2);
+    /* Starting PCI Bus number */
+    build_append_int_noprefix(table_data, 0, 1);
+    /* Final PCI Bus number */
+    build_append_int_noprefix(table_data, PCIE_MMCFG_BUS(info->size - 1), 1);
+    /* Reserved */
+    build_append_int_noprefix(table_data, 0, 4);
 
-    build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1, NULL, NULL);
+    build_header(linker, table_data, (void *)(table_data->data + mcfg_start),
+                 "MCFG", table_data->len - mcfg_start, 1, NULL, NULL);
 }
 
-- 
MST



WARNING: multiple messages have this Message-ID (diff)
From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Wei Yang <richardw.yang@linux.intel.com>,
	Igor Mammedov <imammedo@redhat.com>
Subject: [Qemu-devel] [PULL v2 02/14] acpi: pci: use build_append_foo() API to construct MCFG
Date: Mon, 3 Jun 2019 14:08:24 -0400	[thread overview]
Message-ID: <20190521062836.6541-3-richardw.yang@linux.intel.com> (raw)
Message-ID: <20190603180824.HwD7YvlMZRS6TLELiMNscP7W6w0QI_NTtO9QK5kMq0I@z> (raw)
In-Reply-To: <20190603180807.16140-1-mst@redhat.com>

From: Wei Yang <richardw.yang@linux.intel.com>

build_append_foo() API doesn't need explicit endianness conversions
which eliminates a source of errors and it makes build_mcfg() look like
declarative definition of MCFG table in ACPI spec, which makes it easy
to review.

Signed-off-by: Wei Yang <richardw.yang@linux.intel.com>
Suggested-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>

v3:
   * add some comment on the Configuration Space base address allocation
     structure
v2:
   * miss the reserved[8] of MCFG in last version, add it back
   * drop SOBs and make sure bios-tables-test all OK
Message-Id: <20190521062836.6541-3-richardw.yang@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 include/hw/acpi/acpi-defs.h | 18 ------------------
 hw/acpi/pci.c               | 33 ++++++++++++++++++++++++---------
 2 files changed, 24 insertions(+), 27 deletions(-)

diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h
index f9aa4bd398..57a3f58b0c 100644
--- a/include/hw/acpi/acpi-defs.h
+++ b/include/hw/acpi/acpi-defs.h
@@ -449,24 +449,6 @@ struct AcpiSratProcessorGiccAffinity {
 
 typedef struct AcpiSratProcessorGiccAffinity AcpiSratProcessorGiccAffinity;
 
-/* PCI fw r3.0 MCFG table. */
-/* Subtable */
-struct AcpiMcfgAllocation {
-    uint64_t address;                /* Base address, processor-relative */
-    uint16_t pci_segment;            /* PCI segment group number */
-    uint8_t start_bus_number;       /* Starting PCI Bus number */
-    uint8_t end_bus_number;         /* Final PCI Bus number */
-    uint32_t reserved;
-} QEMU_PACKED;
-typedef struct AcpiMcfgAllocation AcpiMcfgAllocation;
-
-struct AcpiTableMcfg {
-    ACPI_TABLE_HEADER_DEF;
-    uint8_t reserved[8];
-    AcpiMcfgAllocation allocation[0];
-} QEMU_PACKED;
-typedef struct AcpiTableMcfg AcpiTableMcfg;
-
 /*
  * TCPA Description Table
  *
diff --git a/hw/acpi/pci.c b/hw/acpi/pci.c
index fa0fa30bb9..9510597a19 100644
--- a/hw/acpi/pci.c
+++ b/hw/acpi/pci.c
@@ -30,17 +30,32 @@
 
 void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info)
 {
-    AcpiTableMcfg *mcfg;
-    int len = sizeof(*mcfg) + sizeof(mcfg->allocation[0]);
+    int mcfg_start = table_data->len;
 
-    mcfg = acpi_data_push(table_data, len);
-    mcfg->allocation[0].address = cpu_to_le64(info->base);
+    /*
+     * PCI Firmware Specification, Revision 3.0
+     * 4.1.2 MCFG Table Description.
+     */
+    acpi_data_push(table_data, sizeof(AcpiTableHeader));
+    /* Reserved */
+    build_append_int_noprefix(table_data, 0, 8);
 
-    /* Only a single allocation so no need to play with segments */
-    mcfg->allocation[0].pci_segment = cpu_to_le16(0);
-    mcfg->allocation[0].start_bus_number = 0;
-    mcfg->allocation[0].end_bus_number = PCIE_MMCFG_BUS(info->size - 1);
+    /*
+     * Memory Mapped Enhanced Configuration Space Base Address Allocation
+     * Structure
+     */
+    /* Base address, processor-relative */
+    build_append_int_noprefix(table_data, info->base, 8);
+    /* PCI segment group number */
+    build_append_int_noprefix(table_data, 0, 2);
+    /* Starting PCI Bus number */
+    build_append_int_noprefix(table_data, 0, 1);
+    /* Final PCI Bus number */
+    build_append_int_noprefix(table_data, PCIE_MMCFG_BUS(info->size - 1), 1);
+    /* Reserved */
+    build_append_int_noprefix(table_data, 0, 4);
 
-    build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1, NULL, NULL);
+    build_header(linker, table_data, (void *)(table_data->data + mcfg_start),
+                 "MCFG", table_data->len - mcfg_start, 1, NULL, NULL);
 }
 
-- 
MST



WARNING: multiple messages have this Message-ID (diff)
From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Wei Yang <richardw.yang@linux.intel.com>,
	Igor Mammedov <imammedo@redhat.com>
Subject: [Qemu-devel] [PULL v3 02/17] acpi: pci: use build_append_foo() API to construct MCFG
Date: Wed, 5 Jun 2019 16:00:09 -0400	[thread overview]
Message-ID: <20190521062836.6541-3-richardw.yang@linux.intel.com> (raw)
Message-ID: <20190605200009.sXesnFeWlOjuMH8MZ5mH1Tkq3noE56vhpCDszZqlC18@z> (raw)
In-Reply-To: <20190605195913.12243-1-mst@redhat.com>

From: Wei Yang <richardw.yang@linux.intel.com>

build_append_foo() API doesn't need explicit endianness conversions
which eliminates a source of errors and it makes build_mcfg() look like
declarative definition of MCFG table in ACPI spec, which makes it easy
to review.

Signed-off-by: Wei Yang <richardw.yang@linux.intel.com>
Suggested-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>

v3:
   * add some comment on the Configuration Space base address allocation
     structure
v2:
   * miss the reserved[8] of MCFG in last version, add it back
   * drop SOBs and make sure bios-tables-test all OK
Message-Id: <20190521062836.6541-3-richardw.yang@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 include/hw/acpi/acpi-defs.h | 18 ------------------
 hw/acpi/pci.c               | 33 ++++++++++++++++++++++++---------
 2 files changed, 24 insertions(+), 27 deletions(-)

diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h
index f9aa4bd398..57a3f58b0c 100644
--- a/include/hw/acpi/acpi-defs.h
+++ b/include/hw/acpi/acpi-defs.h
@@ -449,24 +449,6 @@ struct AcpiSratProcessorGiccAffinity {
 
 typedef struct AcpiSratProcessorGiccAffinity AcpiSratProcessorGiccAffinity;
 
-/* PCI fw r3.0 MCFG table. */
-/* Subtable */
-struct AcpiMcfgAllocation {
-    uint64_t address;                /* Base address, processor-relative */
-    uint16_t pci_segment;            /* PCI segment group number */
-    uint8_t start_bus_number;       /* Starting PCI Bus number */
-    uint8_t end_bus_number;         /* Final PCI Bus number */
-    uint32_t reserved;
-} QEMU_PACKED;
-typedef struct AcpiMcfgAllocation AcpiMcfgAllocation;
-
-struct AcpiTableMcfg {
-    ACPI_TABLE_HEADER_DEF;
-    uint8_t reserved[8];
-    AcpiMcfgAllocation allocation[0];
-} QEMU_PACKED;
-typedef struct AcpiTableMcfg AcpiTableMcfg;
-
 /*
  * TCPA Description Table
  *
diff --git a/hw/acpi/pci.c b/hw/acpi/pci.c
index fa0fa30bb9..9510597a19 100644
--- a/hw/acpi/pci.c
+++ b/hw/acpi/pci.c
@@ -30,17 +30,32 @@
 
 void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info)
 {
-    AcpiTableMcfg *mcfg;
-    int len = sizeof(*mcfg) + sizeof(mcfg->allocation[0]);
+    int mcfg_start = table_data->len;
 
-    mcfg = acpi_data_push(table_data, len);
-    mcfg->allocation[0].address = cpu_to_le64(info->base);
+    /*
+     * PCI Firmware Specification, Revision 3.0
+     * 4.1.2 MCFG Table Description.
+     */
+    acpi_data_push(table_data, sizeof(AcpiTableHeader));
+    /* Reserved */
+    build_append_int_noprefix(table_data, 0, 8);
 
-    /* Only a single allocation so no need to play with segments */
-    mcfg->allocation[0].pci_segment = cpu_to_le16(0);
-    mcfg->allocation[0].start_bus_number = 0;
-    mcfg->allocation[0].end_bus_number = PCIE_MMCFG_BUS(info->size - 1);
+    /*
+     * Memory Mapped Enhanced Configuration Space Base Address Allocation
+     * Structure
+     */
+    /* Base address, processor-relative */
+    build_append_int_noprefix(table_data, info->base, 8);
+    /* PCI segment group number */
+    build_append_int_noprefix(table_data, 0, 2);
+    /* Starting PCI Bus number */
+    build_append_int_noprefix(table_data, 0, 1);
+    /* Final PCI Bus number */
+    build_append_int_noprefix(table_data, PCIE_MMCFG_BUS(info->size - 1), 1);
+    /* Reserved */
+    build_append_int_noprefix(table_data, 0, 4);
 
-    build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1, NULL, NULL);
+    build_header(linker, table_data, (void *)(table_data->data + mcfg_start),
+                 "MCFG", table_data->len - mcfg_start, 1, NULL, NULL);
 }
 
-- 
MST



  parent reply	other threads:[~2019-05-21  6:57 UTC|newest]

Thread overview: 108+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-21  6:28 [Qemu-devel] [PATCH v6 0/2] Extract build_mcfg Part 2 Wei Yang
2019-05-21  6:28 ` [Qemu-devel] [PATCH v6 1/2] hw/acpi: Consolidate build_mcfg to pci.c Wei Yang
2019-05-22  9:11   ` Igor Mammedov
2019-05-29 16:37   ` [Qemu-devel] [PULL 02/10] " Michael S. Tsirkin
2019-06-03 18:08   ` [Qemu-devel] [PULL v2 01/14] " Michael S. Tsirkin
2019-06-05 20:00   ` [Qemu-devel] [PULL v3 01/17] " Michael S. Tsirkin
2019-05-21  6:28 ` Wei Yang [this message]
2019-05-29 16:37   ` [Qemu-devel] [PULL 03/10] acpi: pci: use build_append_foo() API to construct MCFG Michael S. Tsirkin
2019-06-03 18:08   ` [Qemu-devel] [PULL v2 02/14] " Michael S. Tsirkin
2019-06-05 20:00   ` [Qemu-devel] [PULL v3 02/17] " Michael S. Tsirkin
  -- strict thread matches above, loose matches on Subject: below --
2019-06-05 20:00 [Qemu-devel] [PULL v3 00/17] virtio, pci, pc: cleanups, features Michael S. Tsirkin
2019-06-05 20:00 ` [Qemu-devel] [PULL v3 10/17] bios-tables-test: add diff allowed list Michael S. Tsirkin
2019-06-05 20:00 ` [Qemu-devel] [PULL v3 14/17] bios-tables-test: list all tables that differ Michael S. Tsirkin
2019-06-05 20:00 ` [Qemu-devel] [PULL v3 17/17] bios-tables-test: ignore identical binaries Michael S. Tsirkin
2019-06-06 13:08 ` [Qemu-devel] [PULL v3 00/17] virtio, pci, pc: cleanups, features Peter Maydell
2019-06-03 18:08 [Qemu-devel] [PULL v2 00/14] " Michael S. Tsirkin
2019-06-03 18:08 ` [Qemu-devel] [PULL v2 10/14] bios-tables-test: add diff allowed list Michael S. Tsirkin
2019-06-03 18:09 ` [Qemu-devel] [PULL v2 14/14] bios-tables-test: list all tables that differ Michael S. Tsirkin
2019-06-04 15:57 ` [Qemu-devel] [PULL v2 00/14] virtio, pci, pc: cleanups, features Peter Maydell
2019-06-04 16:48   ` Michael S. Tsirkin
2019-06-04 16:55     ` Peter Maydell
2019-06-04 17:09       ` Michael S. Tsirkin
2019-06-03 11:22 [Qemu-devel] [PATCH v6 0/2] tests: acpi: ARM testing support Igor Mammedov
2019-06-03 11:22 ` [Qemu-devel] [PATCH v6 1/2] tests: add expected ACPI tables for arm/virt board Igor Mammedov
2019-06-05 20:00   ` [Qemu-devel] [PULL v3 15/17] " Michael S. Tsirkin
2019-06-03 11:22 ` [Qemu-devel] [PATCH v6 2/2] tests: acpi: add simple arm/virt testcase Igor Mammedov
2019-06-03 16:08   ` Laszlo Ersek
2019-06-04 11:51     ` Igor Mammedov
2019-06-04 17:13       ` Michael S. Tsirkin
2019-06-05 20:00   ` [Qemu-devel] [PULL v3 16/17] " Michael S. Tsirkin
2019-05-29 16:37 [Qemu-devel] [PULL 00/10] virtio, pci, pc: cleanups Michael S. Tsirkin
2019-04-30  6:10 ` [Qemu-devel] [PATCH] vhost: remove the dead code Jie Wang
2019-04-30  6:10   ` Jie Wang
2019-05-01 16:38   ` Stefan Hajnoczi
2019-05-01 16:38     ` Stefan Hajnoczi
2019-05-29 12:12     ` [Qemu-devel] Ping " Jie Wang
2019-05-29 16:37   ` [Qemu-devel] [PULL 08/10] " Michael S. Tsirkin
2019-06-03 18:08   ` [Qemu-devel] [PULL v2 07/14] " Michael S. Tsirkin
2019-06-05 20:00   ` [Qemu-devel] [PULL v3 07/17] " Michael S. Tsirkin
2019-04-30  6:29 ` [Qemu-devel] [PATCH] vhost: fix incorrect print type Jie Wang
2019-04-30  6:29   ` Jie Wang
2019-04-30  8:48   ` Philippe Mathieu-Daudé
2019-04-30  8:48     ` Philippe Mathieu-Daudé
2019-05-29 13:13     ` Philippe Mathieu-Daudé
2019-06-06  9:20       ` [Qemu-devel] [Qemu-trivial] " Laurent Vivier
2019-05-02  8:30   ` [Qemu-devel] " no-reply
2019-05-02  8:30     ` no-reply
2019-05-02  9:34   ` no-reply
2019-05-02  9:34     ` no-reply
2019-05-29 16:37   ` [Qemu-devel] [PULL 09/10] " Michael S. Tsirkin
2019-06-03 18:08   ` [Qemu-devel] [PULL v2 08/14] " Michael S. Tsirkin
2019-06-05 20:00   ` [Qemu-devel] [PULL v3 08/17] " Michael S. Tsirkin
2019-04-30  7:15 ` [Qemu-devel] [PATCH] vhost: fix memory leak in vhost_user_scsi_realize Jie Wang
2019-04-30  7:15   ` Jie Wang
2019-05-01 16:40   ` Stefan Hajnoczi
2019-05-01 16:40     ` Stefan Hajnoczi
2019-05-29 12:12     ` [Qemu-devel] Ping " Jie Wang
2019-05-29 16:37   ` [Qemu-devel] [PULL 10/10] " Michael S. Tsirkin
2019-06-03 18:08   ` [Qemu-devel] [PULL v2 09/14] " Michael S. Tsirkin
2019-06-05 20:00   ` [Qemu-devel] [PULL v3 09/17] " Michael S. Tsirkin
2019-05-21 14:23 ` [Qemu-devel] [PATCH v2] docs: smbios: remove family=x from type2 entry description Igor Mammedov
2019-05-29 16:37   ` [Qemu-devel] [PULL 07/10] " Michael S. Tsirkin
2019-06-03 18:08   ` [Qemu-devel] [PULL v2 06/14] " Michael S. Tsirkin
2019-06-05 20:00   ` [Qemu-devel] [PULL v3 06/17] " Michael S. Tsirkin
2019-05-29 16:37 ` [Qemu-devel] [PULL 01/10] bios-tables-test: add diff allowed list Michael S. Tsirkin
2019-05-29 22:02 ` [Qemu-devel] [PULL 00/10] virtio, pci, pc: cleanups Michael S. Tsirkin
2019-05-13  6:19 [Qemu-devel] [PATCH v4 0/5] Simplify some not-really-necessary PCI bus callbacks David Gibson
2019-05-13  6:19 ` [Qemu-devel] [PATCH v4 1/5] pcie: Remove redundant test in pcie_mmcfg_data_{read, write}() David Gibson
2019-05-13  6:19 ` [Qemu-devel] [PATCH v4 2/5] pci: Simplify pci_bus_is_root() David Gibson
2019-05-13  6:19 ` [Qemu-devel] [PATCH v4 3/5] pcie: Simplify pci_adjust_config_limit() David Gibson
2019-05-29 16:37   ` [Qemu-devel] [PULL 04/10] " Michael S. Tsirkin
2019-06-03 18:08   ` [Qemu-devel] [PULL v2 03/14] " Michael S. Tsirkin
2019-06-05 20:00   ` [Qemu-devel] [PULL v3 03/17] " Michael S. Tsirkin
2019-05-13  6:19 ` [Qemu-devel] [PATCH v4 4/5] pci: Make is_bridge a bool David Gibson
2019-05-29 16:37   ` [Qemu-devel] [PULL 05/10] " Michael S. Tsirkin
2019-06-03 18:08   ` [Qemu-devel] [PULL v2 04/14] " Michael S. Tsirkin
2019-06-05 20:00   ` [Qemu-devel] [PULL v3 04/17] " Michael S. Tsirkin
2019-05-13  6:19 ` [Qemu-devel] [PATCH v4 5/5] pci: Fold pci_get_bus_devfn() into its sole caller David Gibson
2019-05-13  8:02   ` Greg Kurz
2019-05-29 16:37   ` [Qemu-devel] [PULL 06/10] " Michael S. Tsirkin
2019-06-03 18:08   ` [Qemu-devel] [PULL v2 05/14] " Michael S. Tsirkin
2019-06-05 20:00   ` [Qemu-devel] [PULL v3 05/17] " Michael S. Tsirkin
2019-04-16 12:59 [Qemu-devel] [PATCH v2 0/3] vhost-scsi: Support migration Liran Alon
2019-04-16 12:59 ` Liran Alon
2019-04-16 12:59 ` [Qemu-devel] [PATCH v2 1/3] vhost-scsi: The vhost backend should be stopped when the VM is not running Liran Alon
2019-04-16 12:59   ` Liran Alon
2019-06-03 18:09   ` [Qemu-devel] [PULL v2 11/14] " Michael S. Tsirkin
2019-06-05 20:00   ` [Qemu-devel] [PULL v3 11/17] " Michael S. Tsirkin
2019-04-16 12:59 ` [Qemu-devel] [PATCH v2 2/3] vhost-scsi: Add VMState descriptor Liran Alon
2019-04-16 12:59   ` Liran Alon
2019-06-03 18:09   ` [Qemu-devel] [PULL v2 12/14] " Michael S. Tsirkin
2019-06-05 20:00   ` [Qemu-devel] [PULL v3 12/17] " Michael S. Tsirkin
2019-04-16 12:59 ` [Qemu-devel] [PATCH v2 3/3] vhost-scsi: Allow user to enable migration Liran Alon
2019-04-16 12:59   ` Liran Alon
2019-06-03 18:09   ` [Qemu-devel] [PULL v2 13/14] " Michael S. Tsirkin
2019-06-05 20:00   ` [Qemu-devel] [PULL v3 13/17] " Michael S. Tsirkin
2019-04-18  9:41 ` [Qemu-devel] [PATCH v2 0/3] vhost-scsi: Support migration Stefan Hajnoczi
2019-04-18  9:41   ` Stefan Hajnoczi
2019-04-24 16:38   ` Liran Alon
2019-04-24 16:38     ` Liran Alon
2019-04-25  8:38     ` Stefan Hajnoczi
2019-04-25  8:38       ` Stefan Hajnoczi
2019-04-25 17:53       ` Michael S. Tsirkin
2019-04-25 17:53         ` Michael S. Tsirkin
2019-05-10 11:48         ` Liran Alon
2019-06-02 23:40         ` Liran Alon
2019-06-03  0:39           ` Michael S. Tsirkin
2019-06-12 15:26           ` Paolo Bonzini

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