From: Yoshinori Sato <ysato@users.sourceforge.jp>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, richard.henderson@linaro.org,
Yoshinori Sato <ysato@users.sourceforge.jp>,
philmd@redhat.com
Subject: [Qemu-devel] [PATCH v15 00/12] Add RX archtecture support
Date: Wed, 22 May 2019 23:29:44 +0900 [thread overview]
Message-ID: <20190522142956.41916-1-ysato@users.sourceforge.jp> (raw)
Hello.
This patch series is added Renesas RX target emulation.
Fix is bellow.
- Reorder patches.
- Rewrite renesas_cmt.
Convert to RCMTChannelStatus
- Use CPUClass::tlb_fill
- Use tcg_gen_abs_i32
- Fix racw instructions.
- Cleanup for review comment.
target/rx/helper.c - fix spelling.
hw/intc/rx_icu.h - cleanup constant definition.
hw/registerfields.h - fix macro definion order.
My git repository is bellow.
git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git tags/rx-20190522
Testing binaries bellow.
u-boot
Download - https://osdn.net/users/ysato/pf/qemu/dl/u-boot.bin.gz
starting
$ gzip -d u-boot.bin.gz
$ qemu-system-rx -bios u-boot.bin
linux and pico-root (only sash)
Download - https://osdn.net/users/ysato/pf/qemu/dl/zImage (kernel)
https://osdn.net/users/ysato/pf/qemu/dl/rx-qemu.dtb (DeviceTree)
starting
$ qemu-system-rx -kernel zImage -dtb rx-qemu.dtb -append "earlycon"
Yoshinori Sato (12):
qemu/bitops.h: Add extract8 and extract16
hw/registerfields.h: Add 8bit and 16bit register macros.
target/rx: TCG translation
target/rx: TCG helper
target/rx: CPU definition
target/rx: RX disassembler
hw/intc: RX62N interrupt controller (ICUa)
hw/timer: RX62N internal timer modules
hw/char: RX62N serial communication interface (SCI)
hw/rx: RX Target hardware definition
Add rx-softmmu
MAINTAINERS: Add RX
configure | 8 +
default-configs/rx-softmmu.mak | 3 +
include/disas/dis-asm.h | 5 +
include/hw/char/renesas_sci.h | 45 +
include/hw/intc/rx_icu.h | 55 +
include/hw/registerfields.h | 30 +-
include/hw/rx/rx.h | 7 +
include/hw/rx/rx62n.h | 94 ++
include/hw/timer/renesas_cmt.h | 44 +
include/hw/timer/renesas_tmr.h | 50 +
include/qemu/bitops.h | 38 +
include/sysemu/arch_init.h | 1 +
target/rx/cpu.h | 227 ++++
target/rx/helper.h | 31 +
arch_init.c | 2 +
hw/char/renesas_sci.c | 340 ++++++
hw/intc/rx_icu.c | 376 +++++++
hw/rx/rx-virt.c | 105 ++
hw/rx/rx62n.c | 238 ++++
hw/timer/renesas_cmt.c | 260 +++++
hw/timer/renesas_tmr.c | 455 ++++++++
target/rx/cpu.c | 239 ++++
target/rx/disas.c | 1480 ++++++++++++++++++++++++
target/rx/gdbstub.c | 112 ++
target/rx/helper.c | 148 +++
target/rx/monitor.c | 38 +
target/rx/op_helper.c | 470 ++++++++
target/rx/translate.c | 2420 ++++++++++++++++++++++++++++++++++++++++
MAINTAINERS | 21 +
hw/Kconfig | 1 +
hw/char/Kconfig | 3 +
hw/char/Makefile.objs | 1 +
hw/intc/Kconfig | 3 +
hw/intc/Makefile.objs | 1 +
hw/rx/Kconfig | 14 +
hw/rx/Makefile.objs | 2 +
hw/timer/Kconfig | 6 +
hw/timer/Makefile.objs | 3 +
target/rx/Makefile.objs | 12 +
target/rx/insns.decode | 621 +++++++++++
40 files changed, 8008 insertions(+), 1 deletion(-)
create mode 100644 default-configs/rx-softmmu.mak
create mode 100644 include/hw/char/renesas_sci.h
create mode 100644 include/hw/intc/rx_icu.h
create mode 100644 include/hw/rx/rx.h
create mode 100644 include/hw/rx/rx62n.h
create mode 100644 include/hw/timer/renesas_cmt.h
create mode 100644 include/hw/timer/renesas_tmr.h
create mode 100644 target/rx/cpu.h
create mode 100644 target/rx/helper.h
create mode 100644 hw/char/renesas_sci.c
create mode 100644 hw/intc/rx_icu.c
create mode 100644 hw/rx/rx-virt.c
create mode 100644 hw/rx/rx62n.c
create mode 100644 hw/timer/renesas_cmt.c
create mode 100644 hw/timer/renesas_tmr.c
create mode 100644 target/rx/cpu.c
create mode 100644 target/rx/disas.c
create mode 100644 target/rx/gdbstub.c
create mode 100644 target/rx/helper.c
create mode 100644 target/rx/monitor.c
create mode 100644 target/rx/op_helper.c
create mode 100644 target/rx/translate.c
create mode 100644 hw/rx/Kconfig
create mode 100644 hw/rx/Makefile.objs
create mode 100644 target/rx/Makefile.objs
create mode 100644 target/rx/insns.decode
--
2.11.0
next reply other threads:[~2019-05-22 14:32 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-22 14:29 Yoshinori Sato [this message]
2019-05-22 14:29 ` [Qemu-devel] [PATCH v15 01/12] qemu/bitops.h: Add extract8 and extract16 Yoshinori Sato
2019-05-22 14:29 ` [Qemu-devel] [PATCH v15 02/12] hw/registerfields.h: Add 8bit and 16bit register macros Yoshinori Sato
2019-05-22 14:29 ` [Qemu-devel] [PATCH v15 03/12] target/rx: TCG translation Yoshinori Sato
2019-05-22 14:29 ` [Qemu-devel] [PATCH v15 04/12] target/rx: TCG helper Yoshinori Sato
2019-05-22 14:29 ` [Qemu-devel] [PATCH v15 05/12] target/rx: CPU definition Yoshinori Sato
2019-05-22 14:29 ` [Qemu-devel] [PATCH v15 06/12] target/rx: RX disassembler Yoshinori Sato
2019-05-22 14:29 ` [Qemu-devel] [PATCH v15 07/12] hw/intc: RX62N interrupt controller (ICUa) Yoshinori Sato
2019-05-22 14:29 ` [Qemu-devel] [PATCH v15 08/12] hw/timer: RX62N internal timer modules Yoshinori Sato
2019-05-22 14:29 ` [Qemu-devel] [PATCH v15 09/12] hw/char: RX62N serial communication interface (SCI) Yoshinori Sato
2019-05-22 14:29 ` [Qemu-devel] [PATCH v15 10/12] hw/rx: RX Target hardware definition Yoshinori Sato
2019-05-22 14:29 ` [Qemu-devel] [PATCH v15 11/12] Add rx-softmmu Yoshinori Sato
2019-05-22 14:29 ` [Qemu-devel] [PATCH v15 12/12] MAINTAINERS: Add RX Yoshinori Sato
2019-05-22 14:50 ` [Qemu-devel] [PATCH v15 00/12] Add RX archtecture support Philippe Mathieu-Daudé
2019-05-23 8:19 ` Yoshinori Sato
2019-05-22 15:15 ` no-reply
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