From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 07/16] tcg: Add TCG_OPF_NOT_PRESENT if TCG_TARGET_HAS_foo is negative
Date: Wed, 22 May 2019 18:28:12 -0400 [thread overview]
Message-ID: <20190522222821.23850-8-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190522222821.23850-1-richard.henderson@linaro.org>
If INDEX_op_foo is always expanded by tcg_expand_vec_op, then
there may be no reasonable set of constraints to return from
tcg_target_op_def for that opcode.
Let TCG_TARGET_HAS_foo be specified as -1 in that case. Thus a
boolean test for TCG_TARGET_HAS_foo is true, but we will not
assert within process_op_defs when no constraints are specified.
Compare this with tcg_can_emit_vec_op, which already uses this
tri-state indication.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tcg-opc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h
index c7d971fa3d..242d608e6d 100644
--- a/tcg/tcg-opc.h
+++ b/tcg/tcg-opc.h
@@ -35,7 +35,7 @@ DEF(call, 0, 0, 3, TCG_OPF_CALL_CLOBBER | TCG_OPF_NOT_PRESENT)
DEF(br, 0, 0, 1, TCG_OPF_BB_END)
-#define IMPL(X) (__builtin_constant_p(X) && !(X) ? TCG_OPF_NOT_PRESENT : 0)
+#define IMPL(X) (__builtin_constant_p(X) && (X) <= 0 ? TCG_OPF_NOT_PRESENT : 0)
#if TCG_TARGET_REG_BITS == 32
# define IMPL64 TCG_OPF_64BIT | TCG_OPF_NOT_PRESENT
#else
--
2.17.1
next prev parent reply other threads:[~2019-05-22 22:37 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-22 22:28 [Qemu-devel] [PULL 00/16] tcg queued patches Richard Henderson
2019-05-22 22:28 ` [Qemu-devel] [PULL 01/16] tcg/i386: Fix dupi/dupm for avx1 and 32-bit hosts Richard Henderson
2019-05-22 22:28 ` [Qemu-devel] [PULL 02/16] tcg: Fix missing checks and clears in tcg_gen_gvec_dup_mem Richard Henderson
2019-05-22 22:28 ` [Qemu-devel] [PULL 03/16] tcg: Add support for vector bitwise select Richard Henderson
2019-05-22 22:28 ` [Qemu-devel] [PULL 04/16] tcg: Add support for vector compare select Richard Henderson
2019-05-22 22:28 ` [Qemu-devel] [PULL 05/16] tcg: Introduce do_op3_nofail for vector expansion Richard Henderson
2019-05-22 22:28 ` [Qemu-devel] [PULL 06/16] tcg: Expand vector minmax using cmp+cmpsel Richard Henderson
2019-05-22 22:28 ` Richard Henderson [this message]
2019-05-22 22:28 ` [Qemu-devel] [PULL 08/16] tcg/i386: Support vector comparison select value Richard Henderson
2019-05-30 11:26 ` Peter Maydell
2019-05-30 12:50 ` Richard Henderson
2019-05-30 14:54 ` Aleksandar Markovic
2019-05-30 17:45 ` Richard Henderson
2019-05-30 23:18 ` Aleksandar Markovic
2019-05-22 22:28 ` [Qemu-devel] [PULL 09/16] tcg/i386: Remove expansion for missing minmax Richard Henderson
2019-05-22 22:28 ` [Qemu-devel] [PULL 10/16] tcg/i386: Use umin/umax in expanding unsigned compare Richard Henderson
2019-05-22 22:28 ` [Qemu-devel] [PULL 11/16] tcg/aarch64: Support vector bitwise select value Richard Henderson
2019-05-22 22:28 ` [Qemu-devel] [PULL 12/16] tcg/aarch64: Split up is_fimm Richard Henderson
2019-05-22 22:28 ` [Qemu-devel] [PULL 13/16] tcg/aarch64: Use MVNI in tcg_out_dupi_vec Richard Henderson
2019-05-22 22:28 ` [Qemu-devel] [PULL 14/16] tcg/aarch64: Build vector immediates with two insns Richard Henderson
2019-05-22 22:28 ` [Qemu-devel] [PULL 15/16] tcg/aarch64: Allow immediates for vector ORR and BIC Richard Henderson
2019-05-22 22:28 ` [Qemu-devel] [PULL 16/16] tcg/i386: Use MOVDQA for TCG_TYPE_V128 load/store Richard Henderson
2019-05-28 17:28 ` David Hildenbrand
2019-05-28 18:33 ` David Hildenbrand
2019-05-28 18:46 ` David Hildenbrand
2019-05-28 21:34 ` Richard Henderson
2019-05-23 8:17 ` [Qemu-devel] [PULL 00/16] tcg queued patches Aleksandar Markovic
2019-05-23 12:42 ` Richard Henderson
2019-05-24 10:43 ` Peter Maydell
2019-05-28 16:58 ` David Hildenbrand
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