* [Qemu-devel] [PULL 01/12] target/arm: Use extract2 for EXTR
2019-05-23 14:23 [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
@ 2019-05-23 14:23 ` Peter Maydell
2019-05-23 14:23 ` [Qemu-devel] [PULL 02/12] target/arm: Simplify BFXIL expansion Peter Maydell
` (11 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Peter Maydell @ 2019-05-23 14:23 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
This is, after all, how we implement extract2 in tcg/aarch64.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190514011129.11330-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate-a64.c | 38 ++++++++++++++++++++------------------
1 file changed, 20 insertions(+), 18 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index b7c5a928b4a..2b135b938ce 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -4114,25 +4114,27 @@ static void disas_extract(DisasContext *s, uint32_t insn)
} else {
tcg_gen_ext32u_i64(tcg_rd, cpu_reg(s, rm));
}
- } else if (rm == rn) { /* ROR */
- tcg_rm = cpu_reg(s, rm);
- if (sf) {
- tcg_gen_rotri_i64(tcg_rd, tcg_rm, imm);
- } else {
- TCGv_i32 tmp = tcg_temp_new_i32();
- tcg_gen_extrl_i64_i32(tmp, tcg_rm);
- tcg_gen_rotri_i32(tmp, tmp, imm);
- tcg_gen_extu_i32_i64(tcg_rd, tmp);
- tcg_temp_free_i32(tmp);
- }
} else {
- tcg_rm = read_cpu_reg(s, rm, sf);
- tcg_rn = read_cpu_reg(s, rn, sf);
- tcg_gen_shri_i64(tcg_rm, tcg_rm, imm);
- tcg_gen_shli_i64(tcg_rn, tcg_rn, bitsize - imm);
- tcg_gen_or_i64(tcg_rd, tcg_rm, tcg_rn);
- if (!sf) {
- tcg_gen_ext32u_i64(tcg_rd, tcg_rd);
+ tcg_rm = cpu_reg(s, rm);
+ tcg_rn = cpu_reg(s, rn);
+
+ if (sf) {
+ /* Specialization to ROR happens in EXTRACT2. */
+ tcg_gen_extract2_i64(tcg_rd, tcg_rm, tcg_rn, imm);
+ } else {
+ TCGv_i32 t0 = tcg_temp_new_i32();
+
+ tcg_gen_extrl_i64_i32(t0, tcg_rm);
+ if (rm == rn) {
+ tcg_gen_rotri_i32(t0, t0, imm);
+ } else {
+ TCGv_i32 t1 = tcg_temp_new_i32();
+ tcg_gen_extrl_i64_i32(t1, tcg_rn);
+ tcg_gen_extract2_i32(t0, t0, t1, imm);
+ tcg_temp_free_i32(t1);
+ }
+ tcg_gen_extu_i32_i64(tcg_rd, t0);
+ tcg_temp_free_i32(t0);
}
}
}
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PULL 02/12] target/arm: Simplify BFXIL expansion
2019-05-23 14:23 [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
2019-05-23 14:23 ` [Qemu-devel] [PULL 01/12] target/arm: Use extract2 for EXTR Peter Maydell
@ 2019-05-23 14:23 ` Peter Maydell
2019-05-23 14:23 ` [Qemu-devel] [PULL 03/12] target/arm: Fix vector operation segfault Peter Maydell
` (10 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Peter Maydell @ 2019-05-23 14:23 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
The mask implied by the extract is redundant with the one
implied by the deposit. Also, fix spelling of BFXIL.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190514011129.11330-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate-a64.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 2b135b938ce..42999c58011 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -4043,8 +4043,8 @@ static void disas_bitfield(DisasContext *s, uint32_t insn)
tcg_gen_extract_i64(tcg_rd, tcg_tmp, ri, len);
return;
}
- /* opc == 1, BXFIL fall through to deposit */
- tcg_gen_extract_i64(tcg_tmp, tcg_tmp, ri, len);
+ /* opc == 1, BFXIL fall through to deposit */
+ tcg_gen_shri_i64(tcg_tmp, tcg_tmp, ri);
pos = 0;
} else {
/* Handle the ri > si case with a deposit
@@ -4062,7 +4062,7 @@ static void disas_bitfield(DisasContext *s, uint32_t insn)
len = ri;
}
- if (opc == 1) { /* BFM, BXFIL */
+ if (opc == 1) { /* BFM, BFXIL */
tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, pos, len);
} else {
/* SBFM or UBFM: We start with zero, and we haven't modified
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PULL 03/12] target/arm: Fix vector operation segfault
2019-05-23 14:23 [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
2019-05-23 14:23 ` [Qemu-devel] [PULL 01/12] target/arm: Use extract2 for EXTR Peter Maydell
2019-05-23 14:23 ` [Qemu-devel] [PULL 02/12] target/arm: Simplify BFXIL expansion Peter Maydell
@ 2019-05-23 14:23 ` Peter Maydell
2019-05-23 14:23 ` [Qemu-devel] [PULL 04/12] arm: Move system_clock_scale to armv7m_systick.h Peter Maydell
` (9 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Peter Maydell @ 2019-05-23 14:23 UTC (permalink / raw)
To: qemu-devel
From: Alistair Francis <alistair.francis@wdc.com>
Commit 89e68b575 "target/arm: Use vector operations for saturation"
causes this abort() when booting QEMU ARM with a Cortex-A15:
0 0x00007ffff4c2382f in raise () at /usr/lib/libc.so.6
1 0x00007ffff4c0e672 in abort () at /usr/lib/libc.so.6
2 0x00005555559c1839 in disas_neon_data_insn (insn=<optimized out>, s=<optimized out>) at ./target/arm/translate.c:6673
3 0x00005555559c1839 in disas_neon_data_insn (s=<optimized out>, insn=<optimized out>) at ./target/arm/translate.c:6386
4 0x00005555559cd8a4 in disas_arm_insn (insn=4081107068, s=0x7fffe59a9510) at ./target/arm/translate.c:9289
5 0x00005555559cd8a4 in arm_tr_translate_insn (dcbase=0x7fffe59a9510, cpu=<optimized out>) at ./target/arm/translate.c:13612
6 0x00005555558d1d39 in translator_loop (ops=0x5555561cc580 <arm_translator_ops>, db=0x7fffe59a9510, cpu=0x55555686a2f0, tb=<optimized out>, max_insns=<optimized out>) at ./accel/tcg/translator.c:96
7 0x00005555559d10d4 in gen_intermediate_code (cpu=cpu@entry=0x55555686a2f0, tb=tb@entry=0x7fffd7840080 <code_gen_buffer+126091347>, max_insns=max_insns@entry=512) at ./target/arm/translate.c:13901
8 0x00005555558d06b9 in tb_gen_code (cpu=cpu@entry=0x55555686a2f0, pc=3067096216, cs_base=0, flags=192, cflags=-16252928, cflags@entry=524288) at ./accel/tcg/translate-all.c:1736
9 0x00005555558ce467 in tb_find (cf_mask=524288, tb_exit=1, last_tb=0x7fffd783e640 <code_gen_buffer+126084627>, cpu=0x1) at ./accel/tcg/cpu-exec.c:407
10 0x00005555558ce467 in cpu_exec (cpu=cpu@entry=0x55555686a2f0) at ./accel/tcg/cpu-exec.c:728
11 0x000055555588b0cf in tcg_cpu_exec (cpu=0x55555686a2f0) at ./cpus.c:1431
12 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=0x55555686a2f0) at ./cpus.c:1735
13 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=arg@entry=0x55555686a2f0) at ./cpus.c:1709
14 0x0000555555d2629a in qemu_thread_start (args=<optimized out>) at ./util/qemu-thread-posix.c:502
15 0x00007ffff4db8a92 in start_thread () at /usr/lib/libpthread.
This patch ensures that we don't hit the abort() in the second switch
case in disas_neon_data_insn() as we will return from the first case.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: ad91b397f360b2fc7f4087e476f7df5b04d42ddb.1558021877.git.alistair.francis@wdc.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index dd053c80d62..298c262825d 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -6598,13 +6598,13 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc),
rn_ofs, rm_ofs, vec_size, vec_size,
(u ? uqadd_op : sqadd_op) + size);
- break;
+ return 0;
case NEON_3R_VQSUB:
tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc),
rn_ofs, rm_ofs, vec_size, vec_size,
(u ? uqsub_op : sqsub_op) + size);
- break;
+ return 0;
case NEON_3R_VMUL: /* VMUL */
if (u) {
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PULL 04/12] arm: Move system_clock_scale to armv7m_systick.h
2019-05-23 14:23 [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
` (2 preceding siblings ...)
2019-05-23 14:23 ` [Qemu-devel] [PULL 03/12] target/arm: Fix vector operation segfault Peter Maydell
@ 2019-05-23 14:23 ` Peter Maydell
2019-05-23 14:23 ` [Qemu-devel] [PULL 05/12] arm: Remove unnecessary includes of hw/arm/arm.h Peter Maydell
` (8 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Peter Maydell @ 2019-05-23 14:23 UTC (permalink / raw)
To: qemu-devel
The system_clock_scale global is used only by the armv7m systick
device; move the extern declaration to the armv7m_systick.h header,
and expand the comment to explain what it is and that it should
ideally be replaced with a different approach.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190516163857.6430-2-peter.maydell@linaro.org
---
include/hw/arm/arm.h | 4 ----
include/hw/timer/armv7m_systick.h | 22 ++++++++++++++++++++++
2 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h
index ffed39252d8..ba3a9b41422 100644
--- a/include/hw/arm/arm.h
+++ b/include/hw/arm/arm.h
@@ -167,8 +167,4 @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu,
const struct arm_boot_info *info,
hwaddr mvbar_addr);
-/* Multiplication factor to convert from system clock ticks to qemu timer
- ticks. */
-extern int system_clock_scale;
-
#endif /* HW_ARM_H */
diff --git a/include/hw/timer/armv7m_systick.h b/include/hw/timer/armv7m_systick.h
index cca04defd8e..25e5ceacc85 100644
--- a/include/hw/timer/armv7m_systick.h
+++ b/include/hw/timer/armv7m_systick.h
@@ -31,4 +31,26 @@ typedef struct SysTickState {
qemu_irq irq;
} SysTickState;
+/*
+ * Multiplication factor to convert from system clock ticks to qemu timer
+ * ticks. This should be set (by board code, usually) to a value
+ * equal to NANOSECONDS_PER_SECOND / frq, where frq is the clock frequency
+ * in Hz of the CPU.
+ *
+ * This value is used by the systick device when it is running in
+ * its "use the CPU clock" mode (ie when SYST_CSR.CLKSOURCE == 1) to
+ * set how fast the timer should tick.
+ *
+ * TODO: we should refactor this so that rather than using a global
+ * we use a device property or something similar. This is complicated
+ * because (a) the property would need to be plumbed through from the
+ * board code down through various layers to the systick device
+ * and (b) the property needs to be modifiable after realize, because
+ * the stellaris board uses this to implement the behaviour where the
+ * guest can reprogram the PLL registers to downclock the CPU, and the
+ * systick device needs to react accordingly. Possibly this should
+ * be deferred until we have a good API for modelling clock trees.
+ */
+extern int system_clock_scale;
+
#endif
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PULL 05/12] arm: Remove unnecessary includes of hw/arm/arm.h
2019-05-23 14:23 [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
` (3 preceding siblings ...)
2019-05-23 14:23 ` [Qemu-devel] [PULL 04/12] arm: Move system_clock_scale to armv7m_systick.h Peter Maydell
@ 2019-05-23 14:23 ` Peter Maydell
2019-05-23 14:23 ` [Qemu-devel] [PULL 06/12] arm: Rename hw/arm/arm.h to hw/arm/boot.h Peter Maydell
` (7 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Peter Maydell @ 2019-05-23 14:23 UTC (permalink / raw)
To: qemu-devel
The hw/arm/arm.h header now only includes declarations relating
to boot.c code, so it is only needed by Arm board or SoC code.
Remove some unnecessary inclusions of it from target/arm files
and from hw/intc/armv7m_nvic.c.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190516163857.6430-3-peter.maydell@linaro.org
---
hw/intc/armv7m_nvic.c | 1 -
target/arm/arm-semi.c | 1 -
target/arm/cpu.c | 1 -
target/arm/cpu64.c | 1 -
target/arm/kvm.c | 1 -
target/arm/kvm32.c | 1 -
target/arm/kvm64.c | 1 -
7 files changed, 7 deletions(-)
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 3a346a682a3..815e720cfab 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -16,7 +16,6 @@
#include "cpu.h"
#include "hw/sysbus.h"
#include "qemu/timer.h"
-#include "hw/arm/arm.h"
#include "hw/intc/armv7m_nvic.h"
#include "target/arm/cpu.h"
#include "exec/exec-all.h"
diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c
index 8b5fd7bc6e3..ddb94e0aba0 100644
--- a/target/arm/arm-semi.c
+++ b/target/arm/arm-semi.c
@@ -29,7 +29,6 @@
#else
#include "qemu-common.h"
#include "exec/gdbstub.h"
-#include "hw/arm/arm.h"
#include "qemu/cutils.h"
#endif
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 8eee1d8c59a..9b23ac2c935 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -30,7 +30,6 @@
#if !defined(CONFIG_USER_ONLY)
#include "hw/loader.h"
#endif
-#include "hw/arm/arm.h"
#include "sysemu/sysemu.h"
#include "sysemu/hw_accel.h"
#include "kvm_arm.h"
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 835f73cceb5..0ec8cd41f19 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -25,7 +25,6 @@
#if !defined(CONFIG_USER_ONLY)
#include "hw/loader.h"
#endif
-#include "hw/arm/arm.h"
#include "sysemu/sysemu.h"
#include "sysemu/kvm.h"
#include "kvm_arm.h"
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index 59956346126..fe4f461d4ef 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -23,7 +23,6 @@
#include "cpu.h"
#include "trace.h"
#include "internals.h"
-#include "hw/arm/arm.h"
#include "hw/pci/pci.h"
#include "exec/memattrs.h"
#include "exec/address-spaces.h"
diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c
index 327375f6252..4e54e372a66 100644
--- a/target/arm/kvm32.c
+++ b/target/arm/kvm32.c
@@ -20,7 +20,6 @@
#include "sysemu/kvm.h"
#include "kvm_arm.h"
#include "internals.h"
-#include "hw/arm/arm.h"
#include "qemu/log.h"
static inline void set_feature(uint64_t *features, int feature)
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index e3ba1492482..998d21f399f 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -26,7 +26,6 @@
#include "sysemu/kvm.h"
#include "kvm_arm.h"
#include "internals.h"
-#include "hw/arm/arm.h"
static bool have_guest_debug;
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PULL 06/12] arm: Rename hw/arm/arm.h to hw/arm/boot.h
2019-05-23 14:23 [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
` (4 preceding siblings ...)
2019-05-23 14:23 ` [Qemu-devel] [PULL 05/12] arm: Remove unnecessary includes of hw/arm/arm.h Peter Maydell
@ 2019-05-23 14:23 ` Peter Maydell
2019-05-23 14:23 ` [Qemu-devel] [PULL 07/12] hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1} Peter Maydell
` (6 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Peter Maydell @ 2019-05-23 14:23 UTC (permalink / raw)
To: qemu-devel
The header file hw/arm/arm.h now includes only declarations
relating to hw/arm/boot.c functionality. Rename it accordingly,
and adjust its header comment.
The bulk of this commit was created via
perl -pi -e 's|hw/arm/arm.h|hw/arm/boot.h|' hw/arm/*.c include/hw/arm/*.h
In a few cases we can just delete the #include:
hw/arm/msf2-soc.c, include/hw/arm/aspeed_soc.h and
include/hw/arm/bcm2836.h did not require it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190516163857.6430-4-peter.maydell@linaro.org
---
include/hw/arm/allwinner-a10.h | 2 +-
include/hw/arm/aspeed_soc.h | 1 -
include/hw/arm/bcm2836.h | 1 -
include/hw/arm/{arm.h => boot.h} | 8 ++++----
include/hw/arm/fsl-imx25.h | 2 +-
include/hw/arm/fsl-imx31.h | 2 +-
include/hw/arm/fsl-imx6.h | 2 +-
include/hw/arm/fsl-imx6ul.h | 2 +-
include/hw/arm/fsl-imx7.h | 2 +-
include/hw/arm/virt.h | 2 +-
include/hw/arm/xlnx-versal.h | 2 +-
include/hw/arm/xlnx-zynqmp.h | 2 +-
hw/arm/armsse.c | 2 +-
hw/arm/armv7m.c | 2 +-
hw/arm/aspeed.c | 2 +-
hw/arm/boot.c | 2 +-
hw/arm/collie.c | 2 +-
hw/arm/exynos4210.c | 2 +-
hw/arm/exynos4_boards.c | 2 +-
hw/arm/highbank.c | 2 +-
hw/arm/integratorcp.c | 2 +-
hw/arm/mainstone.c | 2 +-
hw/arm/microbit.c | 2 +-
hw/arm/mps2-tz.c | 2 +-
hw/arm/mps2.c | 2 +-
hw/arm/msf2-soc.c | 1 -
hw/arm/msf2-som.c | 2 +-
hw/arm/musca.c | 2 +-
hw/arm/musicpal.c | 2 +-
hw/arm/netduino2.c | 2 +-
hw/arm/nrf51_soc.c | 2 +-
hw/arm/nseries.c | 2 +-
hw/arm/omap1.c | 2 +-
hw/arm/omap2.c | 2 +-
hw/arm/omap_sx1.c | 2 +-
hw/arm/palm.c | 2 +-
hw/arm/raspi.c | 2 +-
hw/arm/realview.c | 2 +-
hw/arm/spitz.c | 2 +-
hw/arm/stellaris.c | 2 +-
hw/arm/stm32f205_soc.c | 2 +-
hw/arm/strongarm.c | 2 +-
hw/arm/tosa.c | 2 +-
hw/arm/versatilepb.c | 2 +-
hw/arm/vexpress.c | 2 +-
hw/arm/virt.c | 2 +-
hw/arm/xilinx_zynq.c | 2 +-
hw/arm/xlnx-versal.c | 2 +-
hw/arm/z2.c | 2 +-
49 files changed, 49 insertions(+), 52 deletions(-)
rename include/hw/arm/{arm.h => boot.h} (98%)
diff --git a/include/hw/arm/allwinner-a10.h b/include/hw/arm/allwinner-a10.h
index 389e128d0fc..6305b9c586f 100644
--- a/include/hw/arm/allwinner-a10.h
+++ b/include/hw/arm/allwinner-a10.h
@@ -3,7 +3,7 @@
#include "qemu-common.h"
#include "qemu/error-report.h"
#include "hw/char/serial.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/timer/allwinner-a10-pit.h"
#include "hw/intc/allwinner-a10-pic.h"
#include "hw/net/allwinner_emac.h"
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 11ec0179db5..836b2ba8bf1 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -12,7 +12,6 @@
#ifndef ASPEED_SOC_H
#define ASPEED_SOC_H
-#include "hw/arm/arm.h"
#include "hw/intc/aspeed_vic.h"
#include "hw/misc/aspeed_scu.h"
#include "hw/misc/aspeed_sdmc.h"
diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h
index 93248399ba0..a2cb8454dea 100644
--- a/include/hw/arm/bcm2836.h
+++ b/include/hw/arm/bcm2836.h
@@ -11,7 +11,6 @@
#ifndef BCM2836_H
#define BCM2836_H
-#include "hw/arm/arm.h"
#include "hw/arm/bcm2835_peripherals.h"
#include "hw/intc/bcm2836_control.h"
diff --git a/include/hw/arm/arm.h b/include/hw/arm/boot.h
similarity index 98%
rename from include/hw/arm/arm.h
rename to include/hw/arm/boot.h
index ba3a9b41422..c48cc4c2bca 100644
--- a/include/hw/arm/arm.h
+++ b/include/hw/arm/boot.h
@@ -1,5 +1,5 @@
/*
- * Misc ARM declarations
+ * ARM kernel loader.
*
* Copyright (c) 2006 CodeSourcery.
* Written by Paul Brook
@@ -8,8 +8,8 @@
*
*/
-#ifndef HW_ARM_H
-#define HW_ARM_H
+#ifndef HW_ARM_BOOT_H
+#define HW_ARM_BOOT_H
#include "exec/memory.h"
#include "target/arm/cpu-qom.h"
@@ -167,4 +167,4 @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu,
const struct arm_boot_info *info,
hwaddr mvbar_addr);
-#endif /* HW_ARM_H */
+#endif /* HW_ARM_BOOT_H */
diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h
index 65a73714efe..3280ab1fb05 100644
--- a/include/hw/arm/fsl-imx25.h
+++ b/include/hw/arm/fsl-imx25.h
@@ -17,7 +17,7 @@
#ifndef FSL_IMX25_H
#define FSL_IMX25_H
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/intc/imx_avic.h"
#include "hw/misc/imx25_ccm.h"
#include "hw/char/imx_serial.h"
diff --git a/include/hw/arm/fsl-imx31.h b/include/hw/arm/fsl-imx31.h
index d408abbba0d..e68a81efd75 100644
--- a/include/hw/arm/fsl-imx31.h
+++ b/include/hw/arm/fsl-imx31.h
@@ -17,7 +17,7 @@
#ifndef FSL_IMX31_H
#define FSL_IMX31_H
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/intc/imx_avic.h"
#include "hw/misc/imx31_ccm.h"
#include "hw/char/imx_serial.h"
diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
index 06f8aaeda42..1265a55c3b0 100644
--- a/include/hw/arm/fsl-imx6.h
+++ b/include/hw/arm/fsl-imx6.h
@@ -17,7 +17,7 @@
#ifndef FSL_IMX6_H
#define FSL_IMX6_H
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/cpu/a9mpcore.h"
#include "hw/misc/imx6_ccm.h"
#include "hw/misc/imx6_src.h"
diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h
index 58972171943..9e94e98f8ee 100644
--- a/include/hw/arm/fsl-imx6ul.h
+++ b/include/hw/arm/fsl-imx6ul.h
@@ -17,7 +17,7 @@
#ifndef FSL_IMX6UL_H
#define FSL_IMX6UL_H
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/cpu/a15mpcore.h"
#include "hw/misc/imx6ul_ccm.h"
#include "hw/misc/imx6_src.h"
diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
index d848262bfdd..4101f80251e 100644
--- a/include/hw/arm/fsl-imx7.h
+++ b/include/hw/arm/fsl-imx7.h
@@ -19,7 +19,7 @@
#ifndef FSL_IMX7_H
#define FSL_IMX7_H
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/cpu/a15mpcore.h"
#include "hw/intc/imx_gpcv2.h"
#include "hw/misc/imx7_ccm.h"
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 424070924ed..73005f05ae8 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -34,7 +34,7 @@
#include "exec/hwaddr.h"
#include "qemu/notify.h"
#include "hw/boards.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/block/flash.h"
#include "sysemu/kvm.h"
#include "hw/intc/arm_gicv3_common.h"
diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
index ec7c859d08c..14405c1465d 100644
--- a/include/hw/arm/xlnx-versal.h
+++ b/include/hw/arm/xlnx-versal.h
@@ -13,7 +13,7 @@
#define XLNX_VERSAL_H
#include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/intc/arm_gicv3.h"
#define TYPE_XLNX_VERSAL "xlnx-versal"
diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
index 591515c7600..cd90b04310c 100644
--- a/include/hw/arm/xlnx-zynqmp.h
+++ b/include/hw/arm/xlnx-zynqmp.h
@@ -18,7 +18,7 @@
#ifndef XLNX_ZYNQMP_H
#include "qemu-common.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/intc/arm_gic.h"
#include "hw/net/cadence_gem.h"
#include "hw/char/cadence_uart.h"
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index 76cc6905798..83b920334d5 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -17,7 +17,7 @@
#include "hw/sysbus.h"
#include "hw/registerfields.h"
#include "hw/arm/armsse.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
/* Format of the System Information block SYS_CONFIG register */
typedef enum SysConfigFormat {
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index c4b2a9a1f5c..029572258f0 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -13,7 +13,7 @@
#include "qemu-common.h"
#include "cpu.h"
#include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/loader.h"
#include "elf.h"
#include "sysemu/qtest.h"
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 29d225ed140..415cff7a015 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -14,7 +14,7 @@
#include "qemu-common.h"
#include "cpu.h"
#include "exec/address-spaces.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/boards.h"
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index a830655e1af..7279185bd94 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -12,7 +12,7 @@
#include "qapi/error.h"
#include <libfdt.h>
#include "hw/hw.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/arm/linux-boot-if.h"
#include "sysemu/kvm.h"
#include "sysemu/sysemu.h"
diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index d12604c5739..3db3c560048 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -14,7 +14,7 @@
#include "hw/sysbus.h"
#include "hw/boards.h"
#include "strongarm.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/block/flash.h"
#include "exec/address-spaces.h"
#include "cpu.h"
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index af82e955421..0bf61134550 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -30,7 +30,7 @@
#include "hw/boards.h"
#include "sysemu/sysemu.h"
#include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/loader.h"
#include "hw/arm/exynos4210.h"
#include "hw/sd/sdhci.h"
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index ea8100f65a8..71f0af3bdbb 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -29,7 +29,7 @@
#include "sysemu/sysemu.h"
#include "hw/sysbus.h"
#include "net/net.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "exec/address-spaces.h"
#include "hw/arm/exynos4210.h"
#include "hw/net/lan9118.h"
diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
index 96ccf18d863..a89a1d3a7c1 100644
--- a/hw/arm/highbank.c
+++ b/hw/arm/highbank.c
@@ -20,7 +20,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/loader.h"
#include "net/net.h"
#include "sysemu/kvm.h"
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index 0b6f24465e4..d18caab8bdd 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -13,7 +13,7 @@
#include "cpu.h"
#include "hw/sysbus.h"
#include "hw/boards.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/misc/arm_integrator_debug.h"
#include "hw/net/smc91c111.h"
#include "net/net.h"
diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c
index c1cec590379..cd1f904c6c9 100644
--- a/hw/arm/mainstone.c
+++ b/hw/arm/mainstone.c
@@ -16,7 +16,7 @@
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/arm/pxa.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "net/net.h"
#include "hw/net/smc91c111.h"
#include "hw/boards.h"
diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
index da67bf6d9d1..e9a891f7d37 100644
--- a/hw/arm/microbit.c
+++ b/hw/arm/microbit.c
@@ -11,7 +11,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/boards.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "sysemu/sysemu.h"
#include "exec/address-spaces.h"
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 7832408bb70..c167a5fa593 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -40,7 +40,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/arm/armv7m.h"
#include "hw/or-irq.h"
#include "hw/boards.h"
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 54b7395849f..b74f1378c90 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -25,7 +25,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/arm/armv7m.h"
#include "hw/or-irq.h"
#include "hw/boards.h"
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
index 2702e90b453..d700b212f8d 100644
--- a/hw/arm/msf2-soc.c
+++ b/hw/arm/msf2-soc.c
@@ -26,7 +26,6 @@
#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
-#include "hw/arm/arm.h"
#include "exec/address-spaces.h"
#include "hw/char/serial.h"
#include "hw/boards.h"
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index 2432b5e9352..8c550a8bddc 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -27,7 +27,7 @@
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "hw/boards.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "exec/address-spaces.h"
#include "hw/arm/msf2-soc.h"
#include "cpu.h"
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index 23aff43f4bc..825d80e75a4 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -24,7 +24,7 @@
#include "qapi/error.h"
#include "exec/address-spaces.h"
#include "sysemu/sysemu.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/arm/armsse.h"
#include "hw/boards.h"
#include "hw/char/pl011.h"
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index 93ec3c5698f..5645997b56f 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -14,7 +14,7 @@
#include "qemu-common.h"
#include "cpu.h"
#include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "net/net.h"
#include "sysemu/sysemu.h"
#include "hw/boards.h"
diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
index f936017d4a7..f57fc38f920 100644
--- a/hw/arm/netduino2.c
+++ b/hw/arm/netduino2.c
@@ -27,7 +27,7 @@
#include "hw/boards.h"
#include "qemu/error-report.h"
#include "hw/arm/stm32f205_soc.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
static void netduino2_init(MachineState *machine)
{
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index 3e633d160ea..ce618edc7b3 100644
--- a/hw/arm/nrf51_soc.c
+++ b/hw/arm/nrf51_soc.c
@@ -11,7 +11,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu-common.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/sysbus.h"
#include "hw/boards.h"
#include "hw/misc/unimp.h"
diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c
index 303f7a31e1c..4a79f5c88b4 100644
--- a/hw/arm/nseries.c
+++ b/hw/arm/nseries.c
@@ -25,7 +25,7 @@
#include "qemu/bswap.h"
#include "sysemu/sysemu.h"
#include "hw/arm/omap.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/irq.h"
#include "ui/console.h"
#include "hw/boards.h"
diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c
index 539d29ef9ce..28fbe275a88 100644
--- a/hw/arm/omap1.c
+++ b/hw/arm/omap1.c
@@ -24,7 +24,7 @@
#include "cpu.h"
#include "hw/boards.h"
#include "hw/hw.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/arm/omap.h"
#include "sysemu/sysemu.h"
#include "hw/arm/soc_dma.h"
diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c
index 446223906e4..23e72db79ef 100644
--- a/hw/arm/omap2.c
+++ b/hw/arm/omap2.c
@@ -26,7 +26,7 @@
#include "sysemu/qtest.h"
#include "hw/boards.h"
#include "hw/hw.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/arm/omap.h"
#include "sysemu/sysemu.h"
#include "qemu/timer.h"
diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
index 95a4fe7e7f0..cae78d0a368 100644
--- a/hw/arm/omap_sx1.c
+++ b/hw/arm/omap_sx1.c
@@ -31,7 +31,7 @@
#include "ui/console.h"
#include "hw/arm/omap.h"
#include "hw/boards.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/block/flash.h"
#include "sysemu/qtest.h"
#include "exec/address-spaces.h"
diff --git a/hw/arm/palm.c b/hw/arm/palm.c
index 139d27d1cc0..9eb9612bce9 100644
--- a/hw/arm/palm.c
+++ b/hw/arm/palm.c
@@ -25,7 +25,7 @@
#include "ui/console.h"
#include "hw/arm/omap.h"
#include "hw/boards.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/input/tsc2xxx.h"
#include "hw/loader.h"
#include "exec/address-spaces.h"
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index fe2bb511b98..2b5fe10e2f0 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -20,7 +20,7 @@
#include "qemu/error-report.h"
#include "hw/boards.h"
#include "hw/loader.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "sysemu/sysemu.h"
#define SMPBOOT_ADDR 0x300 /* this should leave enough space for ATAGS */
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index 05a244df255..d42a76e7a1c 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -12,7 +12,7 @@
#include "qemu-common.h"
#include "cpu.h"
#include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/arm/primecell.h"
#include "hw/net/lan9118.h"
#include "hw/net/smc91c111.h"
diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c
index 22f5958b9da..723cf5d5929 100644
--- a/hw/arm/spitz.c
+++ b/hw/arm/spitz.c
@@ -14,7 +14,7 @@
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/arm/pxa.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "sysemu/sysemu.h"
#include "hw/pcmcia.h"
#include "hw/i2c/i2c.h"
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index 5059aedbaa2..499035f5c8f 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -11,7 +11,7 @@
#include "qapi/error.h"
#include "hw/sysbus.h"
#include "hw/ssi/ssi.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "qemu/timer.h"
#include "hw/i2c/i2c.h"
#include "net/net.h"
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
index 980e5af13c5..a5b6f7bda2b 100644
--- a/hw/arm/stm32f205_soc.c
+++ b/hw/arm/stm32f205_soc.c
@@ -25,7 +25,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu-common.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "exec/address-spaces.h"
#include "hw/arm/stm32f205_soc.h"
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index 644a9c45b4e..a1ecbddaab9 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -33,7 +33,7 @@
#include "hw/sysbus.h"
#include "strongarm.h"
#include "qemu/error-report.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "chardev/char-fe.h"
#include "chardev/char-serial.h"
#include "sysemu/sysemu.h"
diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c
index 9a1247797fe..7843d68d465 100644
--- a/hw/arm/tosa.c
+++ b/hw/arm/tosa.c
@@ -15,7 +15,7 @@
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/arm/pxa.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/arm/sharpsl.h"
#include "hw/pcmcia.h"
#include "hw/boards.h"
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index 25166e15171..f471fb70255 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -12,7 +12,7 @@
#include "qemu-common.h"
#include "cpu.h"
#include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/net/smc91c111.h"
#include "net/net.h"
#include "sysemu/sysemu.h"
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index d8634f3dd29..2b3b0c2334e 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -26,7 +26,7 @@
#include "qemu-common.h"
#include "cpu.h"
#include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/arm/primecell.h"
#include "hw/net/lan9118.h"
#include "hw/i2c/i2c.h"
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 5331ab71e22..bf54f10b515 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -33,7 +33,7 @@
#include "qemu/option.h"
#include "qapi/error.h"
#include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/arm/primecell.h"
#include "hw/arm/virt.h"
#include "hw/block/flash.h"
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index b3b82157597..198e3f97634 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -20,7 +20,7 @@
#include "qemu-common.h"
#include "cpu.h"
#include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "net/net.h"
#include "exec/address-spaces.h"
#include "sysemu/sysemu.h"
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index 5ee58c09be8..e8e4278eb3b 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -17,7 +17,7 @@
#include "net/net.h"
#include "sysemu/sysemu.h"
#include "sysemu/kvm.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "kvm_arm.h"
#include "hw/misc/unimp.h"
#include "hw/intc/arm_gicv3_common.h"
diff --git a/hw/arm/z2.c b/hw/arm/z2.c
index 1f906ef20bc..44aa748d39d 100644
--- a/hw/arm/z2.c
+++ b/hw/arm/z2.c
@@ -14,7 +14,7 @@
#include "qemu/osdep.h"
#include "hw/hw.h"
#include "hw/arm/pxa.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/i2c/i2c.h"
#include "hw/ssi/ssi.h"
#include "hw/boards.h"
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PULL 07/12] hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}
2019-05-23 14:23 [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
` (5 preceding siblings ...)
2019-05-23 14:23 ` [Qemu-devel] [PULL 06/12] arm: Rename hw/arm/arm.h to hw/arm/boot.h Peter Maydell
@ 2019-05-23 14:23 ` Peter Maydell
2019-05-23 14:23 ` [Qemu-devel] [PULL 08/12] hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3 Peter Maydell
` (5 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Peter Maydell @ 2019-05-23 14:23 UTC (permalink / raw)
To: qemu-devel
In ich_vmcr_write() we enforce "writes of BPR fields to less than
their minimum sets them to the minimum" by doing a "read vbpr and
write it back" operation. A typo here meant that we weren't handling
writes to these fields correctly, because we were reading from VBPR0
but writing to VBPR1.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190520162809.2677-4-peter.maydell@linaro.org
---
hw/intc/arm_gicv3_cpuif.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c
index cbad6037f19..000bdbd6247 100644
--- a/hw/intc/arm_gicv3_cpuif.c
+++ b/hw/intc/arm_gicv3_cpuif.c
@@ -2366,7 +2366,7 @@ static void ich_vmcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
/* Enforce "writing BPRs to less than minimum sets them to the minimum"
* by reading and writing back the fields.
*/
- write_vbpr(cs, GICV3_G1, read_vbpr(cs, GICV3_G0));
+ write_vbpr(cs, GICV3_G0, read_vbpr(cs, GICV3_G0));
write_vbpr(cs, GICV3_G1, read_vbpr(cs, GICV3_G1));
gicv3_cpuif_virt_update(cs);
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PULL 08/12] hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3
2019-05-23 14:23 [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
` (6 preceding siblings ...)
2019-05-23 14:23 ` [Qemu-devel] [PULL 07/12] hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1} Peter Maydell
@ 2019-05-23 14:23 ` Peter Maydell
2019-05-23 14:23 ` [Qemu-devel] [PULL 09/12] hw/arm/exynos4: Remove unuseful debug code Peter Maydell
` (4 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Peter Maydell @ 2019-05-23 14:23 UTC (permalink / raw)
To: qemu-devel
The ICC_CTLR_EL3 register includes some bits which are aliases
of bits in the ICC_CTLR_EL1(S) and (NS) registers. QEMU chooses
to keep those bits in the cs->icc_ctlr_el1[] struct fields.
Unfortunately a missing '~' in the code to update the bits
in those fields meant that writing to ICC_CTLR_EL3 would corrupt
the ICC_CLTR_EL1 register values.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190520162809.2677-5-peter.maydell@linaro.org
---
hw/intc/arm_gicv3_cpuif.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c
index 000bdbd6247..3b212d91c8f 100644
--- a/hw/intc/arm_gicv3_cpuif.c
+++ b/hw/intc/arm_gicv3_cpuif.c
@@ -1856,7 +1856,7 @@ static void icc_ctlr_el3_write(CPUARMState *env, const ARMCPRegInfo *ri,
trace_gicv3_icc_ctlr_el3_write(gicv3_redist_affid(cs), value);
/* *_EL1NS and *_EL1S bits are aliases into the ICC_CTLR_EL1 bits. */
- cs->icc_ctlr_el1[GICV3_NS] &= (ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
+ cs->icc_ctlr_el1[GICV3_NS] &= ~(ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
if (value & ICC_CTLR_EL3_EOIMODE_EL1NS) {
cs->icc_ctlr_el1[GICV3_NS] |= ICC_CTLR_EL1_EOIMODE;
}
@@ -1864,7 +1864,7 @@ static void icc_ctlr_el3_write(CPUARMState *env, const ARMCPRegInfo *ri,
cs->icc_ctlr_el1[GICV3_NS] |= ICC_CTLR_EL1_CBPR;
}
- cs->icc_ctlr_el1[GICV3_S] &= (ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
+ cs->icc_ctlr_el1[GICV3_S] &= ~(ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
if (value & ICC_CTLR_EL3_EOIMODE_EL1S) {
cs->icc_ctlr_el1[GICV3_S] |= ICC_CTLR_EL1_EOIMODE;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PULL 09/12] hw/arm/exynos4: Remove unuseful debug code
2019-05-23 14:23 [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
` (7 preceding siblings ...)
2019-05-23 14:23 ` [Qemu-devel] [PULL 08/12] hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3 Peter Maydell
@ 2019-05-23 14:23 ` Peter Maydell
2019-05-23 14:23 ` [Qemu-devel] [PULL 10/12] hw/arm/exynos4: Use the IEC binary prefix definitions Peter Maydell
` (3 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Peter Maydell @ 2019-05-23 14:23 UTC (permalink / raw)
To: qemu-devel
From: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20190520214342.13709-2-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/exynos4_boards.c | 24 ------------------------
1 file changed, 24 deletions(-)
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index 71f0af3bdbb..1b82bce2f4d 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -35,20 +35,6 @@
#include "hw/net/lan9118.h"
#include "hw/boards.h"
-#undef DEBUG
-
-//#define DEBUG
-
-#ifdef DEBUG
- #undef PRINT_DEBUG
- #define PRINT_DEBUG(fmt, args...) \
- do { \
- fprintf(stderr, " [%s:%d] "fmt, __func__, __LINE__, ##args); \
- } while (0)
-#else
- #define PRINT_DEBUG(fmt, args...) do {} while (0)
-#endif
-
#define SMDK_LAN9118_BASE_ADDR 0x05000000
typedef enum Exynos4BoardType {
@@ -140,16 +126,6 @@ exynos4_boards_init_common(MachineState *machine,
exynos4_board_binfo.gic_cpu_if_addr =
EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100;
- PRINT_DEBUG("\n ram_size: %luMiB [0x%08lx]\n"
- " kernel_filename: %s\n"
- " kernel_cmdline: %s\n"
- " initrd_filename: %s\n",
- exynos4_board_ram_size[board_type] / 1048576,
- exynos4_board_ram_size[board_type],
- machine->kernel_filename,
- machine->kernel_cmdline,
- machine->initrd_filename);
-
exynos4_boards_init_ram(s, get_system_memory(),
exynos4_board_ram_size[board_type]);
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PULL 10/12] hw/arm/exynos4: Use the IEC binary prefix definitions
2019-05-23 14:23 [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
` (8 preceding siblings ...)
2019-05-23 14:23 ` [Qemu-devel] [PULL 09/12] hw/arm/exynos4: Remove unuseful debug code Peter Maydell
@ 2019-05-23 14:23 ` Peter Maydell
2019-05-23 14:23 ` [Qemu-devel] [PULL 11/12] hw/arm/exynos4210: Add DMA support for the Exynos4210 Peter Maydell
` (2 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Peter Maydell @ 2019-05-23 14:23 UTC (permalink / raw)
To: qemu-devel
From: Philippe Mathieu-Daudé <philmd@redhat.com>
It eases code review, unit is explicit.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20190520214342.13709-3-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/exynos4_boards.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index 1b82bce2f4d..fa0d7016413 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -22,6 +22,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "qemu-common.h"
@@ -60,8 +61,8 @@ static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = {
};
static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = {
- [EXYNOS4_BOARD_NURI] = 0x40000000,
- [EXYNOS4_BOARD_SMDKC210] = 0x40000000,
+ [EXYNOS4_BOARD_NURI] = 1 * GiB,
+ [EXYNOS4_BOARD_SMDKC210] = 1 * GiB,
};
static struct arm_boot_info exynos4_board_binfo = {
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PULL 11/12] hw/arm/exynos4210: Add DMA support for the Exynos4210
2019-05-23 14:23 [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
` (9 preceding siblings ...)
2019-05-23 14:23 ` [Qemu-devel] [PULL 10/12] hw/arm/exynos4: Use the IEC binary prefix definitions Peter Maydell
@ 2019-05-23 14:23 ` Peter Maydell
2019-05-23 14:23 ` [Qemu-devel] [PULL 12/12] hw/arm/exynos4210: QOM'ify the Exynos4210 SoC Peter Maydell
2019-05-24 10:06 ` [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
12 siblings, 0 replies; 14+ messages in thread
From: Peter Maydell @ 2019-05-23 14:23 UTC (permalink / raw)
To: qemu-devel
From: Guenter Roeck <linux@roeck-us.net>
QEMU already supports pl330. Instantiate it for Exynos4210.
Relevant part of Linux arch/arm/boot/dts/exynos4.dtsi:
/ {
soc: soc {
amba {
pdma0: pdma@12680000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12680000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: pdma@12690000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12690000 0x1000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
mdma1: mdma@12850000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12850000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
};
};
};
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190520214342.13709-4-philmd@redhat.com
[PMD: Do not set default qdev properties, create the controllers in the SoC
rather than the board (Peter Maydell), add dtsi in commit message]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/exynos4210.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index 0bf61134550..f942ed2be96 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -96,6 +96,11 @@
/* EHCI */
#define EXYNOS4210_EHCI_BASE_ADDR 0x12580000
+/* DMA */
+#define EXYNOS4210_PL330_BASE0_ADDR 0x12680000
+#define EXYNOS4210_PL330_BASE1_ADDR 0x12690000
+#define EXYNOS4210_PL330_BASE2_ADDR 0x12850000
+
static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43,
0x09, 0x00, 0x00, 0x00 };
@@ -160,6 +165,19 @@ static uint64_t exynos4210_calc_affinity(int cpu)
return (0x9 << ARM_AFF1_SHIFT) | cpu;
}
+static void pl330_create(uint32_t base, qemu_irq irq, int nreq)
+{
+ SysBusDevice *busdev;
+ DeviceState *dev;
+
+ dev = qdev_create(NULL, "pl330");
+ qdev_prop_set_uint8(dev, "num_periph_req", nreq);
+ qdev_init_nofail(dev);
+ busdev = SYS_BUS_DEVICE(dev);
+ sysbus_mmio_map(busdev, 0, base);
+ sysbus_connect_irq(busdev, 0, irq);
+}
+
Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
{
Exynos4210State *s = g_new0(Exynos4210State, 1);
@@ -410,5 +428,13 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
sysbus_create_simple(TYPE_EXYNOS4210_EHCI, EXYNOS4210_EHCI_BASE_ADDR,
s->irq_table[exynos4210_get_irq(28, 3)]);
+ /*** DMA controllers ***/
+ pl330_create(EXYNOS4210_PL330_BASE0_ADDR,
+ qemu_irq_invert(s->irq_table[exynos4210_get_irq(35, 1)]), 32);
+ pl330_create(EXYNOS4210_PL330_BASE1_ADDR,
+ qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32);
+ pl330_create(EXYNOS4210_PL330_BASE2_ADDR,
+ qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1);
+
return s;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PULL 12/12] hw/arm/exynos4210: QOM'ify the Exynos4210 SoC
2019-05-23 14:23 [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
` (10 preceding siblings ...)
2019-05-23 14:23 ` [Qemu-devel] [PULL 11/12] hw/arm/exynos4210: Add DMA support for the Exynos4210 Peter Maydell
@ 2019-05-23 14:23 ` Peter Maydell
2019-05-24 10:06 ` [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
12 siblings, 0 replies; 14+ messages in thread
From: Peter Maydell @ 2019-05-23 14:23 UTC (permalink / raw)
To: qemu-devel
From: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20190520214342.13709-5-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/exynos4210.h | 9 +++++++--
hw/arm/exynos4210.c | 28 ++++++++++++++++++++++++----
hw/arm/exynos4_boards.c | 9 ++++++---
3 files changed, 37 insertions(+), 9 deletions(-)
diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h
index 098a69ec73d..27c684e851d 100644
--- a/include/hw/arm/exynos4210.h
+++ b/include/hw/arm/exynos4210.h
@@ -85,6 +85,9 @@ typedef struct Exynos4210Irq {
} Exynos4210Irq;
typedef struct Exynos4210State {
+ /*< private >*/
+ SysBusDevice parent_obj;
+ /*< public >*/
ARMCPU *cpu[EXYNOS4210_NCPUS];
Exynos4210Irq irqs;
qemu_irq *irq_table;
@@ -98,11 +101,13 @@ typedef struct Exynos4210State {
I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER];
} Exynos4210State;
+#define TYPE_EXYNOS4210_SOC "exynos4210"
+#define EXYNOS4210_SOC(obj) \
+ OBJECT_CHECK(Exynos4210State, obj, TYPE_EXYNOS4210_SOC)
+
void exynos4210_write_secondary(ARMCPU *cpu,
const struct arm_boot_info *info);
-Exynos4210State *exynos4210_init(MemoryRegion *system_mem);
-
/* Initialize exynos4210 IRQ subsystem stub */
qemu_irq *exynos4210_init_irq(Exynos4210Irq *env);
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index f942ed2be96..e99e9cd11bd 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -178,9 +178,10 @@ static void pl330_create(uint32_t base, qemu_irq irq, int nreq)
sysbus_connect_irq(busdev, 0, irq);
}
-Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
+static void exynos4210_realize(DeviceState *socdev, Error **errp)
{
- Exynos4210State *s = g_new0(Exynos4210State, 1);
+ Exynos4210State *s = EXYNOS4210_SOC(socdev);
+ MemoryRegion *system_mem = get_system_memory();
qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS];
SysBusDevice *busdev;
DeviceState *dev;
@@ -435,6 +436,25 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32);
pl330_create(EXYNOS4210_PL330_BASE2_ADDR,
qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1);
-
- return s;
}
+
+static void exynos4210_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->realize = exynos4210_realize;
+}
+
+static const TypeInfo exynos4210_info = {
+ .name = TYPE_EXYNOS4210_SOC,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(Exynos4210State),
+ .class_init = exynos4210_class_init,
+};
+
+static void exynos4210_register_types(void)
+{
+ type_register_static(&exynos4210_info);
+}
+
+type_init(exynos4210_register_types)
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index fa0d7016413..71f58586c14 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -45,7 +45,7 @@ typedef enum Exynos4BoardType {
} Exynos4BoardType;
typedef struct Exynos4BoardState {
- Exynos4210State *soc;
+ Exynos4210State soc;
MemoryRegion dram0_mem;
MemoryRegion dram1_mem;
} Exynos4BoardState;
@@ -130,7 +130,10 @@ exynos4_boards_init_common(MachineState *machine,
exynos4_boards_init_ram(s, get_system_memory(),
exynos4_board_ram_size[board_type]);
- s->soc = exynos4210_init(get_system_memory());
+ object_initialize(&s->soc, sizeof(s->soc), TYPE_EXYNOS4210_SOC);
+ qdev_set_parent_bus(DEVICE(&s->soc), sysbus_get_default());
+ object_property_set_bool(OBJECT(&s->soc), true, "realized",
+ &error_fatal);
return s;
}
@@ -148,7 +151,7 @@ static void smdkc210_init(MachineState *machine)
EXYNOS4_BOARD_SMDKC210);
lan9215_init(SMDK_LAN9118_BASE_ADDR,
- qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(37, 1)]));
+ qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)]));
arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [Qemu-devel] [PULL 00/12] target-arm queue
2019-05-23 14:23 [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
` (11 preceding siblings ...)
2019-05-23 14:23 ` [Qemu-devel] [PULL 12/12] hw/arm/exynos4210: QOM'ify the Exynos4210 SoC Peter Maydell
@ 2019-05-24 10:06 ` Peter Maydell
12 siblings, 0 replies; 14+ messages in thread
From: Peter Maydell @ 2019-05-24 10:06 UTC (permalink / raw)
To: QEMU Developers
On Thu, 23 May 2019 at 15:23, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> Not very much here, but several people have fallen over
> the vector operation segfault bug, so let's get the fix
> into master.
>
> thanks
> -- PMM
>
> The following changes since commit d418238dca7b4e0b124135827ead3076233052b1:
>
> Merge remote-tracking branch 'remotes/rth/tags/pull-rng-20190522' into staging (2019-05-23 12:57:17 +0100)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190523
>
> for you to fetch changes up to 98e4f4fdb8ea05d840f51f47125924c2bb9df2df:
>
> hw/arm/exynos4210: QOM'ify the Exynos4210 SoC (2019-05-23 14:47:44 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * exynos4210: QOM'ify the Exynos4210 SoC
> * exynos4210: Add DMA support for the Exynos4210
> * arm_gicv3: Fix writes to ICC_CTLR_EL3
> * arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}
> * target/arm: Fix vector operation segfault
> * target/arm: Minor improvements to BFXIL, EXTR
>
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/4.1
for any user-visible changes.
-- PMM
^ permalink raw reply [flat|nested] 14+ messages in thread