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From: John Arbuckle <programmingkidx@gmail.com>
To: richard.henderson@linaro.org, qemu-devel@nongnu.org,
	qemu-ppc@nongnu.orgd, david@gibson.dropbear.id.au,
	mark.cave-ayland@ilande.co.uk
Cc: John Arbuckle <programmingkidx@gmail.com>
Subject: [Qemu-devel] [PATCH 1/2] Implement Floating Point flag Fraction Rounded
Date: Fri, 24 May 2019 22:20:07 -0400	[thread overview]
Message-ID: <20190525022008.24788-2-programmingkidx@gmail.com> (raw)
In-Reply-To: <20190525022008.24788-1-programmingkidx@gmail.com>

Signed-off-by: John Arbuckle <programmingkidx@gmail.com>
---
 fpu/softfloat.c               | 15 ++++++++++++---
 include/fpu/softfloat-types.h |  1 +
 2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 2ba36ec370..ac34f6a2de 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -702,7 +702,7 @@ static FloatParts round_canonical(FloatParts p, float_status *s,
     const uint64_t roundeven_mask = parm->roundeven_mask;
     const int exp_max = parm->exp_max;
     const int frac_shift = parm->frac_shift;
-    uint64_t frac, inc;
+    uint64_t frac, inc, rounded;
     int exp, flags = 0;
     bool overflow_norm;
 
@@ -744,7 +744,12 @@ static FloatParts round_canonical(FloatParts p, float_status *s,
         if (likely(exp > 0)) {
             if (frac & round_mask) {
                 flags |= float_flag_inexact;
-                frac += inc;
+                rounded = frac + inc;
+                if ((rounded ^ frac) & frac_lsb) {
+                    flags |= float_flag_rounded;
+                }
+                frac = rounded;
+
                 if (frac & DECOMPOSED_OVERFLOW_BIT) {
                     frac >>= 1;
                     exp++;
@@ -793,7 +798,11 @@ static FloatParts round_canonical(FloatParts p, float_status *s,
                     break;
                 }
                 flags |= float_flag_inexact;
-                frac += inc;
+                rounded = frac + inc;
+                if ((rounded ^ frac) & frac_lsb) {
+                    flags |= float_flag_rounded;
+                }
+                frac = rounded;
             }
 
             exp = (frac & DECOMPOSED_IMPLICIT_BIT ? 1 : 0);
diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h
index 2aae6a89b1..bee576e0fd 100644
--- a/include/fpu/softfloat-types.h
+++ b/include/fpu/softfloat-types.h
@@ -147,6 +147,7 @@ enum {
 
 enum {
     float_flag_invalid   =  1,
+    float_flag_rounded   =  2,
     float_flag_divbyzero =  4,
     float_flag_overflow  =  8,
     float_flag_underflow = 16,
-- 
2.14.3 (Apple Git-98)



  reply	other threads:[~2019-05-25  2:25 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-25  2:20 [Qemu-devel] [PATCH 0/2] Implement PowerPC FPSCR flag Fraction Rounded John Arbuckle
2019-05-25  2:20 ` John Arbuckle [this message]
2019-06-11 21:00   ` [Qemu-devel] [PATCH 1/2] Implement Floating Point " Richard Henderson
2019-05-25  2:20 ` [Qemu-devel] [PATCH 2/2] Implement the PowerPC Floating Point Status and Control Register Fraction Rounded bit John Arbuckle

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