From: Peter Xu <peterx@redhat.com>
To: Pavel Dovgalyuk <dovgaluk@ispras.ru>
Cc: ehabkost@redhat.com, quintela@redhat.com, dgilbert@redhat.com,
qemu-devel@nongnu.org, pbonzini@redhat.com, rth@twiddle.net
Subject: Re: [Qemu-devel] i386: EFER vs 32-bit CPU
Date: Thu, 30 May 2019 08:52:43 +0800 [thread overview]
Message-ID: <20190530005243.GA28587@xz-x1> (raw)
In-Reply-To: <003a01d51611$6251a2b0$26f4e810$@ru>
On Wed, May 29, 2019 at 02:26:39PM +0300, Pavel Dovgalyuk wrote:
> Hello!
>
>
>
> I found this while debugging the inconsistent saved/restored state of the virtual machine.
>
>
>
> i386 (32 bit) emulation uses this register (in wrmsr and in MMU fault processing).
Sorry if this question is elementary, but... why would a 32bit guest
use IA32_EFER? From SDM I only see 4 bits defined in this MSR (SCE,
LME, LMA, NXE) but is there any of them that should be set in a 32bit
guest?
Regards,
--
Peter Xu
next prev parent reply other threads:[~2019-05-30 0:53 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-29 11:26 [Qemu-devel] i386: EFER vs 32-bit CPU Pavel Dovgalyuk
2019-05-29 11:30 ` Dr. David Alan Gilbert
2019-05-29 11:39 ` Paolo Bonzini
2019-05-29 11:53 ` Pavel Dovgalyuk
2019-05-29 12:36 ` Dr. David Alan Gilbert
2019-05-29 14:03 ` Pavel Dovgalyuk
2019-05-30 0:52 ` Peter Xu [this message]
2019-05-30 5:54 ` Pavel Dovgalyuk
2019-05-30 9:00 ` Peter Xu
2019-05-30 9:04 ` Peter Xu
2019-05-30 11:00 ` TeLeMan
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