From: David Hildenbrand <david@redhat.com>
To: qemu-devel@nongnu.org
Cc: Christian Borntraeger <borntraeger@de.ibm.com>,
Denys Vlasenko <dvlasenk@redhat.com>,
David Hildenbrand <david@redhat.com>
Subject: [Qemu-devel] [PATCH v1 06/23] s390x/tcg: Implement VECTOR FP COMPARE (EQUAL|HIGH|HIGH OR EQUAL)
Date: Fri, 31 May 2019 12:44:15 +0200 [thread overview]
Message-ID: <20190531104432.29379-7-david@redhat.com> (raw)
In-Reply-To: <20190531104432.29379-1-david@redhat.com>
Provide for all three instructions all four combinations of cc bit and
s bit.
Signed-off-by: David Hildenbrand <david@redhat.com>
---
target/s390x/helper.h | 12 ++++
target/s390x/insn-data.def | 6 ++
target/s390x/translate_vx.inc.c | 51 +++++++++++++++
target/s390x/vec_fpu_helper.c | 107 ++++++++++++++++++++++++++++++++
4 files changed, 176 insertions(+)
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index d34d6802a6..33d3bacf74 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -254,6 +254,18 @@ DEF_HELPER_FLAGS_5(gvec_vfa64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfa64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_4(gvec_wfc64, void, cptr, cptr, env, i32)
DEF_HELPER_4(gvec_wfk64, void, cptr, cptr, env, i32)
+DEF_HELPER_FLAGS_5(gvec_vfce64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
+DEF_HELPER_FLAGS_5(gvec_vfce64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
+DEF_HELPER_5(gvec_vfce64_cc, void, ptr, cptr, cptr, env, i32)
+DEF_HELPER_5(gvec_vfce64s_cc, void, ptr, cptr, cptr, env, i32)
+DEF_HELPER_FLAGS_5(gvec_vfch64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
+DEF_HELPER_FLAGS_5(gvec_vfch64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
+DEF_HELPER_5(gvec_vfch64_cc, void, ptr, cptr, cptr, env, i32)
+DEF_HELPER_5(gvec_vfch64s_cc, void, ptr, cptr, cptr, env, i32)
+DEF_HELPER_FLAGS_5(gvec_vfche64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
+DEF_HELPER_FLAGS_5(gvec_vfche64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
+DEF_HELPER_5(gvec_vfche64_cc, void, ptr, cptr, cptr, env, i32)
+DEF_HELPER_5(gvec_vfche64s_cc, void, ptr, cptr, cptr, env, i32)
#ifndef CONFIG_USER_ONLY
DEF_HELPER_3(servc, i32, env, i64, i64)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index c45e101b10..446552f251 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -1212,6 +1212,12 @@
F(0xe7cb, WFC, VRR_a, V, 0, 0, 0, 0, wfc, 0, IF_VEC)
/* VECTOR FP COMPARE AND SIGNAL SCALAR */
F(0xe7ca, WFK, VRR_a, V, 0, 0, 0, 0, wfc, 0, IF_VEC)
+/* VECTOR FP COMPARE EQUAL */
+ F(0xe7e8, VFCE, VRR_c, V, 0, 0, 0, 0, vfc, 0, IF_VEC)
+/* VECTOR FP COMPARE HIGH */
+ F(0xe7eb, VFCH, VRR_c, V, 0, 0, 0, 0, vfc, 0, IF_VEC)
+/* VECTOR FP COMPARE HIGH OR EQUAL */
+ F(0xe7ea, VFCHE, VRR_c, V, 0, 0, 0, 0, vfc, 0, IF_VEC)
#ifndef CONFIG_USER_ONLY
/* COMPARE AND SWAP AND PURGE */
diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
index 283e8aa07a..5571a71e1a 100644
--- a/target/s390x/translate_vx.inc.c
+++ b/target/s390x/translate_vx.inc.c
@@ -2588,3 +2588,54 @@ static DisasJumpType op_wfc(DisasContext *s, DisasOps *o)
set_cc_static(s);
return DISAS_NEXT;
}
+
+static DisasJumpType op_vfc(DisasContext *s, DisasOps *o)
+{
+ const uint8_t fpf = get_field(s->fields, m4);
+ const uint8_t m5 = get_field(s->fields, m5);
+ const uint8_t m6 = get_field(s->fields, m6);
+ const bool se = extract32(m5, 3, 1);
+ const bool cs = extract32(m6, 0, 1);
+ gen_helper_gvec_3_ptr *fn;
+
+ if (fpf != FPF_LONG || extract32(m5, 0, 3) || extract32(m6, 1, 3)) {
+ gen_program_exception(s, PGM_SPECIFICATION);
+ return DISAS_NORETURN;
+ }
+
+ if (cs) {
+ switch (s->fields->op2) {
+ case 0xe8:
+ fn = se ? gen_helper_gvec_vfce64s_cc : gen_helper_gvec_vfce64_cc;
+ break;
+ case 0xeb:
+ fn = se ? gen_helper_gvec_vfch64s_cc : gen_helper_gvec_vfch64_cc;
+ break;
+ case 0xea:
+ fn = se ? gen_helper_gvec_vfche64s_cc : gen_helper_gvec_vfche64_cc;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ } else {
+ switch (s->fields->op2) {
+ case 0xe8:
+ fn = se ? gen_helper_gvec_vfce64s : gen_helper_gvec_vfce64;
+ break;
+ case 0xeb:
+ fn = se ? gen_helper_gvec_vfch64s : gen_helper_gvec_vfch64;
+ break;
+ case 0xea:
+ fn = se ? gen_helper_gvec_vfche64s : gen_helper_gvec_vfche64;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ }
+ gen_gvec_3_ptr(get_field(s->fields, v1), get_field(s->fields, v2),
+ get_field(s->fields, v3), cpu_env, 0, fn);
+ if (cs) {
+ set_cc_static(s);
+ }
+ return DISAS_NEXT;
+}
diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c
index 3c153d8426..1c4d4661ba 100644
--- a/target/s390x/vec_fpu_helper.c
+++ b/target/s390x/vec_fpu_helper.c
@@ -149,3 +149,110 @@ void HELPER(gvec_wfk64)(const void *v1, const void *v2, CPUS390XState *env,
{
env->cc_op = wfc64(v1, v2, env, true, GETPC());
}
+
+static int vfc64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
+ CPUS390XState *env, bool s, bool test_equal, bool test_high,
+ uintptr_t retaddr)
+{
+ uint8_t vxc, vec_exc = 0;
+ S390Vector tmp = {};
+ int match = 0;
+ int i;
+
+ for (i = 0; i < 2; i++) {
+ const float64 a = make_float64(s390_vec_read_element64(v2, i));
+ const float64 b = make_float64(s390_vec_read_element64(v3, i));
+ const int cmp = float64_compare_quiet(a, b, &env->fpu_status);
+
+ if ((cmp == float_relation_equal && test_equal) ||
+ (cmp == float_relation_greater && test_high)) {
+ match++;
+ s390_vec_write_element64(&tmp, i, -1ull);
+ }
+ vxc = check_ieee_exc(env, i, false, &vec_exc);
+ if (s || vxc) {
+ break;
+ }
+ }
+
+ handle_ieee_exc(env, vxc, vec_exc, retaddr);
+ *v1 = tmp;
+ if (match == i + 1) {
+ return 0;
+ } else if (match) {
+ return 1;
+ }
+ return 3;
+}
+
+void HELPER(gvec_vfce64)(void *v1, const void *v2, const void *v3,
+ CPUS390XState *env, uint32_t desc)
+{
+ vfc64(v1, v2, v3, env, false, true, false, GETPC());
+}
+
+void HELPER(gvec_vfce64s)(void *v1, const void *v2, const void *v3,
+ CPUS390XState *env, uint32_t desc)
+{
+ vfc64(v1, v2, v3, env, true, true, false, GETPC());
+}
+
+void HELPER(gvec_vfce64_cc)(void *v1, const void *v2, const void *v3,
+ CPUS390XState *env, uint32_t desc)
+{
+ env->cc_op = vfc64(v1, v2, v3, env, false, true, false, GETPC());
+}
+
+void HELPER(gvec_vfce64s_cc)(void *v1, const void *v2, const void *v3,
+ CPUS390XState *env, uint32_t desc)
+{
+ env->cc_op = vfc64(v1, v2, v3, env, true, true, false, GETPC());
+}
+
+void HELPER(gvec_vfch64)(void *v1, const void *v2, const void *v3,
+ CPUS390XState *env, uint32_t desc)
+{
+ vfc64(v1, v2, v3, env, false, false, true, GETPC());
+}
+
+void HELPER(gvec_vfch64s)(void *v1, const void *v2, const void *v3,
+ CPUS390XState *env, uint32_t desc)
+{
+ vfc64(v1, v2, v3, env, true, false, true, GETPC());
+}
+
+void HELPER(gvec_vfch64_cc)(void *v1, const void *v2, const void *v3,
+ CPUS390XState *env, uint32_t desc)
+{
+ env->cc_op = vfc64(v1, v2, v3, env, false, false, true, GETPC());
+}
+
+void HELPER(gvec_vfch64s_cc)(void *v1, const void *v2, const void *v3,
+ CPUS390XState *env, uint32_t desc)
+{
+ env->cc_op = vfc64(v1, v2, v3, env, true, false, true, GETPC());
+}
+
+void HELPER(gvec_vfche64)(void *v1, const void *v2, const void *v3,
+ CPUS390XState *env, uint32_t desc)
+{
+ vfc64(v1, v2, v3, env, false, true, true, GETPC());
+}
+
+void HELPER(gvec_vfche64s)(void *v1, const void *v2, const void *v3,
+ CPUS390XState *env, uint32_t desc)
+{
+ vfc64(v1, v2, v3, env, true, true, true, GETPC());
+}
+
+void HELPER(gvec_vfche64_cc)(void *v1, const void *v2, const void *v3,
+ CPUS390XState *env, uint32_t desc)
+{
+ env->cc_op = vfc64(v1, v2, v3, env, false, true, true, GETPC());
+}
+
+void HELPER(gvec_vfche64s_cc)(void *v1, const void *v2, const void *v3,
+ CPUS390XState *env, uint32_t desc)
+{
+ env->cc_op = vfc64(v1, v2, v3, env, true, true, true, GETPC());
+}
--
2.20.1
next prev parent reply other threads:[~2019-05-31 10:50 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-31 10:44 [Qemu-devel] [PATCH v1 00/23] s390x/tcg: Vector Instruction Support Part 4 David Hildenbrand
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 01/23] s390x: Use uint64_t for vector registers David Hildenbrand
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 02/23] s390x/tcg: Introduce tcg_s390_vector_exception() David Hildenbrand
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 03/23] s390x/tcg: Export float_comp_to_cc() and float(32|64|128)_dcmask() David Hildenbrand
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 04/23] s390x/tcg: Implement VECTOR FP ADD David Hildenbrand
2019-05-31 15:54 ` Richard Henderson
2019-05-31 16:26 ` David Hildenbrand
2019-05-31 16:30 ` Richard Henderson
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 05/23] s390x/tcg: Implement VECTOR FP COMPARE (AND SIGNAL) SCALAR David Hildenbrand
2019-05-31 16:33 ` Richard Henderson
2019-05-31 10:44 ` David Hildenbrand [this message]
2019-05-31 16:53 ` [Qemu-devel] [PATCH v1 06/23] s390x/tcg: Implement VECTOR FP COMPARE (EQUAL|HIGH|HIGH OR EQUAL) Richard Henderson
2019-05-31 17:18 ` David Hildenbrand
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 07/23] s390x/tcg: Implement VECTOR FP CONVERT FROM FIXED 64-BIT David Hildenbrand
2019-05-31 17:10 ` Richard Henderson
2019-05-31 17:15 ` Richard Henderson
2019-05-31 17:16 ` David Hildenbrand
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 08/23] s390x/tcg: Implement VECTOR FP CONVERT FROM LOGICAL 64-BIT David Hildenbrand
2019-05-31 17:15 ` Richard Henderson
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 09/23] s390x/tcg: Implement VECTOR FP CONVERT TO FIXED 64-BIT David Hildenbrand
2019-05-31 17:17 ` Richard Henderson
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 10/23] s390x/tcg: Implement VECTOR FP CONVERT TO LOGICAL 64-BIT David Hildenbrand
2019-05-31 17:18 ` Richard Henderson
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 11/23] s390x/tcg: Implement VECTOR FP DIVIDE David Hildenbrand
2019-05-31 17:25 ` Richard Henderson
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 12/23] s390x/tcg: Implement VECTOR LOAD FP INTEGER David Hildenbrand
2019-05-31 17:26 ` Richard Henderson
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 13/23] s390x/tcg: Implement VECTOR LOAD LENGTHENED David Hildenbrand
2019-05-31 17:33 ` Richard Henderson
2019-05-31 17:35 ` David Hildenbrand
2019-05-31 17:36 ` Richard Henderson
2019-05-31 17:38 ` David Hildenbrand
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 14/23] s390x/tcg: Implement VECTOR LOAD ROUNDED David Hildenbrand
2019-05-31 17:37 ` Richard Henderson
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 15/23] s390x/tcg: Implement VECTOR FP MULTIPLY David Hildenbrand
2019-05-31 17:37 ` Richard Henderson
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 16/23] s390x/tcg: Implement VECTOR FP MULTIPLY AND (ADD|SUBTRACT) David Hildenbrand
2019-05-31 17:42 ` Richard Henderson
2019-05-31 17:44 ` David Hildenbrand
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 17/23] s390x/tcg: Implement VECTOR FP PERFORM SIGN OPERATION David Hildenbrand
2019-05-31 17:48 ` Richard Henderson
2019-05-31 18:05 ` David Hildenbrand
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 18/23] s390x/tcg: Implement VECTOR FP SQUARE ROOT David Hildenbrand
2019-05-31 17:50 ` Richard Henderson
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 19/23] s390x/tcg: Implement VECTOR FP SUBTRACT David Hildenbrand
2019-05-31 17:51 ` Richard Henderson
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 20/23] s390x/tcg: Implement VECTOR FP TEST DATA CLASS IMMEDIATE David Hildenbrand
2019-05-31 17:40 ` David Hildenbrand
2019-05-31 17:54 ` Richard Henderson
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 21/23] s390x/tcg: Allow linux-user to use vector instructions David Hildenbrand
2019-05-31 17:54 ` Richard Henderson
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 22/23] s390x/tcg: We support the Vector Facility David Hildenbrand
2019-05-31 17:55 ` Richard Henderson
2019-05-31 10:44 ` [Qemu-devel] [PATCH v1 23/23] s390x: Bump the "qemu" CPU model up to a stripped-down z13 David Hildenbrand
2019-05-31 17:57 ` Richard Henderson
2019-05-31 17:58 ` David Hildenbrand
2019-05-31 18:06 ` Richard Henderson
2019-05-31 18:07 ` David Hildenbrand
2019-05-31 10:47 ` [Qemu-devel] [PATCH v1 00/23] s390x/tcg: Vector Instruction Support Part 4 David Hildenbrand
2019-07-19 9:51 ` Aleksandar Markovic
2019-07-19 10:00 ` David Hildenbrand
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