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From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: Yoshinori Sato <ysato@users.sourceforge.jp>,
	qemu-devel@nongnu.org, Igor Mammedov <imammedo@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>
Cc: "Alistair Francis" <alistair@alistair23.me>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [Qemu-devel] [PATCH v18 13/29] hw/registerfields.h: Add 8bit and 16bit register macros
Date: Fri,  7 Jun 2019 17:37:09 +0200	[thread overview]
Message-ID: <20190607153725.18055-14-philmd@redhat.com> (raw)
In-Reply-To: <20190607153725.18055-1-philmd@redhat.com>

Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190607091116.49044-11-ysato@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/hw/registerfields.h | 32 +++++++++++++++++++++++++++++++-
 1 file changed, 31 insertions(+), 1 deletion(-)

diff --git a/include/hw/registerfields.h b/include/hw/registerfields.h
index 2659a58737..a0bb0654d6 100644
--- a/include/hw/registerfields.h
+++ b/include/hw/registerfields.h
@@ -22,6 +22,14 @@
     enum { A_ ## reg = (addr) };                                          \
     enum { R_ ## reg = (addr) / 4 };
 
+#define REG8(reg, addr)                                                  \
+    enum { A_ ## reg = (addr) };                                          \
+    enum { R_ ## reg = (addr) };
+
+#define REG16(reg, addr)                                                  \
+    enum { A_ ## reg = (addr) };                                          \
+    enum { R_ ## reg = (addr) / 2 };
+
 /* Define SHIFT, LENGTH and MASK constants for a field within a register */
 
 /* This macro will define R_FOO_BAR_MASK, R_FOO_BAR_SHIFT and R_FOO_BAR_LENGTH
@@ -34,6 +42,12 @@
                                         MAKE_64BIT_MASK(shift, length)};
 
 /* Extract a field from a register */
+#define FIELD_EX8(storage, reg, field)                                    \
+    extract8((storage), R_ ## reg ## _ ## field ## _SHIFT,                \
+              R_ ## reg ## _ ## field ## _LENGTH)
+#define FIELD_EX16(storage, reg, field)                                   \
+    extract16((storage), R_ ## reg ## _ ## field ## _SHIFT,               \
+              R_ ## reg ## _ ## field ## _LENGTH)
 #define FIELD_EX32(storage, reg, field)                                   \
     extract32((storage), R_ ## reg ## _ ## field ## _SHIFT,               \
               R_ ## reg ## _ ## field ## _LENGTH)
@@ -49,6 +63,22 @@
  * Assigning values larger then the target field will result in
  * compilation warnings.
  */
+#define FIELD_DP8(storage, reg, field, val) ({                            \
+    struct {                                                              \
+        unsigned int v:R_ ## reg ## _ ## field ## _LENGTH;                \
+    } v = { .v = val };                                                   \
+    uint8_t d;                                                            \
+    d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT,           \
+                  R_ ## reg ## _ ## field ## _LENGTH, v.v);               \
+    d; })
+#define FIELD_DP16(storage, reg, field, val) ({                           \
+    struct {                                                              \
+        unsigned int v:R_ ## reg ## _ ## field ## _LENGTH;                \
+    } v = { .v = val };                                                   \
+    uint16_t d;                                                           \
+    d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT,           \
+                  R_ ## reg ## _ ## field ## _LENGTH, v.v);               \
+    d; })
 #define FIELD_DP32(storage, reg, field, val) ({                           \
     struct {                                                              \
         unsigned int v:R_ ## reg ## _ ## field ## _LENGTH;                \
@@ -57,7 +87,7 @@
     d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT,           \
                   R_ ## reg ## _ ## field ## _LENGTH, v.v);               \
     d; })
-#define FIELD_DP64(storage, reg, field, val) ({                           \
+#define FIELD_DP64(storage, reg, field, val) ({                         \
     struct {                                                              \
         unsigned int v:R_ ## reg ## _ ## field ## _LENGTH;                \
     } v = { .v = val };                                                   \
-- 
2.20.1



  parent reply	other threads:[~2019-06-07 17:00 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-07 15:36 [Qemu-devel] [PATCH v18 00/29] Add RX archtecture support Philippe Mathieu-Daudé
2019-06-07 15:36 ` [Qemu-devel] [PATCH v18 01/29] target/rx: TCG translation Philippe Mathieu-Daudé
2019-06-07 15:36 ` [Qemu-devel] [PATCH v18 02/29] target/rx: TCG helper Philippe Mathieu-Daudé
2019-06-07 15:36 ` [Qemu-devel] [PATCH v18 03/29] target/rx: CPU definition Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 04/29] !fixup " Philippe Mathieu-Daudé
2019-06-07 18:02   ` Eric Blake
2019-06-07 18:06     ` Philippe Mathieu-Daudé
2019-06-10 12:59       ` Igor Mammedov
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 05/29] " Philippe Mathieu-Daudé
2019-06-07 15:43   ` Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 06/29] target/rx: RX disassembler Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 07/29] hw/intc: RX62N interrupt controller (ICUa) Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 08/29] hw/timer: RX62N internal timer modules Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 09/29] hw/char: RX62N serial communication interface (SCI) Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 10/29] hw/rx: RX Target hardware definition Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 11/29] !fixup " Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 12/29] qemu/bitops.h: Add extract8 and extract16 Philippe Mathieu-Daudé
2019-06-07 15:37 ` Philippe Mathieu-Daudé [this message]
2019-06-07 20:56   ` [Qemu-devel] [PATCH v18 13/29] hw/registerfields.h: Add 8bit and 16bit register macros Alistair Francis
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 14/29] target/rx: Convert to CPUClass::tlb_fill Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 15/29] target/rx: Add RX to SysEmuTarget Philippe Mathieu-Daudé
2019-06-07 18:04   ` Eric Blake
2019-06-07 18:08     ` Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 16/29] tests: Add rx to machine-none-test.c Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 17/29] hw/rx: Honor -accel qtest Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 18/29] Add rx-softmmu Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 19/29] MAINTAINERS: Add RX Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 20/29] target/rx: Disassemble rx_index_addr into a string Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 21/29] target/rx: Replace operand with prt_ldmi in disassembler Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 22/29] target/rx: Use prt_ldmi for XCHG_mr disassembly Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 23/29] target/rx: Emit all disassembly in one prt() Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 24/29] target/rx: Collect all bytes during disassembly Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 25/29] target/rx: Dump bytes for each insn " Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 26/29] target/rx: Restrict access to extable[] Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 27/29] hw/rx: Restrict the RX62N microcontroller to the RX62N CPU core Philippe Mathieu-Daudé
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 28/29] hw/rx: Fix comments Philippe Mathieu-Daudé
2019-06-07 16:57   ` Peter Maydell
2019-06-07 15:37 ` [Qemu-devel] [PATCH v18 29/29] BootLinuxConsoleTest: Test the RX-Virt machine Philippe Mathieu-Daudé
2019-06-08  0:50 ` [Qemu-devel] [PATCH v18 00/29] Add RX archtecture support no-reply
2019-06-10  6:03 ` Yoshinori Sato

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