From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 15/39] target/lm32: Use env_cpu, env_archcpu
Date: Sun, 9 Jun 2019 19:01:54 -0700 [thread overview]
Message-ID: <20190610020218.9228-16-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190610020218.9228-1-richard.henderson@linaro.org>
Cleanup in the boilerplate that each target must define.
Replace lm32_env_get_cpu with env_archcpu. The combination
CPU(lm32_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/lm32/cpu.h | 5 -----
target/lm32/helper.c | 19 ++++++-------------
target/lm32/op_helper.c | 6 +++---
target/lm32/translate.c | 2 +-
4 files changed, 10 insertions(+), 22 deletions(-)
diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h
index ad9452eb9f..7fb65fb4b6 100644
--- a/target/lm32/cpu.h
+++ b/target/lm32/cpu.h
@@ -195,11 +195,6 @@ struct LM32CPU {
uint32_t features;
};
-static inline LM32CPU *lm32_env_get_cpu(CPULM32State *env)
-{
- return container_of(env, LM32CPU, env);
-}
-
#define ENV_OFFSET offsetof(LM32CPU, env)
#ifndef CONFIG_USER_ONLY
diff --git a/target/lm32/helper.c b/target/lm32/helper.c
index 8cd4840052..9f3b107474 100644
--- a/target/lm32/helper.c
+++ b/target/lm32/helper.c
@@ -58,28 +58,23 @@ hwaddr lm32_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
void lm32_breakpoint_insert(CPULM32State *env, int idx, target_ulong address)
{
- LM32CPU *cpu = lm32_env_get_cpu(env);
-
- cpu_breakpoint_insert(CPU(cpu), address, BP_CPU,
+ cpu_breakpoint_insert(env_cpu(env), address, BP_CPU,
&env->cpu_breakpoint[idx]);
}
void lm32_breakpoint_remove(CPULM32State *env, int idx)
{
- LM32CPU *cpu = lm32_env_get_cpu(env);
-
if (!env->cpu_breakpoint[idx]) {
return;
}
- cpu_breakpoint_remove_by_ref(CPU(cpu), env->cpu_breakpoint[idx]);
+ cpu_breakpoint_remove_by_ref(env_cpu(env), env->cpu_breakpoint[idx]);
env->cpu_breakpoint[idx] = NULL;
}
void lm32_watchpoint_insert(CPULM32State *env, int idx, target_ulong address,
lm32_wp_t wp_type)
{
- LM32CPU *cpu = lm32_env_get_cpu(env);
int flags = 0;
switch (wp_type) {
@@ -98,26 +93,24 @@ void lm32_watchpoint_insert(CPULM32State *env, int idx, target_ulong address,
}
if (flags != 0) {
- cpu_watchpoint_insert(CPU(cpu), address, 1, flags,
- &env->cpu_watchpoint[idx]);
+ cpu_watchpoint_insert(env_cpu(env), address, 1, flags,
+ &env->cpu_watchpoint[idx]);
}
}
void lm32_watchpoint_remove(CPULM32State *env, int idx)
{
- LM32CPU *cpu = lm32_env_get_cpu(env);
-
if (!env->cpu_watchpoint[idx]) {
return;
}
- cpu_watchpoint_remove_by_ref(CPU(cpu), env->cpu_watchpoint[idx]);
+ cpu_watchpoint_remove_by_ref(env_cpu(env), env->cpu_watchpoint[idx]);
env->cpu_watchpoint[idx] = NULL;
}
static bool check_watchpoints(CPULM32State *env)
{
- LM32CPU *cpu = lm32_env_get_cpu(env);
+ LM32CPU *cpu = env_archcpu(env);
int i;
for (i = 0; i < cpu->num_watchpoints; i++) {
diff --git a/target/lm32/op_helper.c b/target/lm32/op_helper.c
index be12b11b02..d184550a7b 100644
--- a/target/lm32/op_helper.c
+++ b/target/lm32/op_helper.c
@@ -16,7 +16,7 @@
#if !defined(CONFIG_USER_ONLY)
void raise_exception(CPULM32State *env, int index)
{
- CPUState *cs = CPU(lm32_env_get_cpu(env));
+ CPUState *cs = env_cpu(env);
cs->exception_index = index;
cpu_loop_exit(cs);
@@ -29,7 +29,7 @@ void HELPER(raise_exception)(CPULM32State *env, uint32_t index)
void HELPER(hlt)(CPULM32State *env)
{
- CPUState *cs = CPU(lm32_env_get_cpu(env));
+ CPUState *cs = env_cpu(env);
cs->halted = 1;
cs->exception_index = EXCP_HLT;
@@ -39,7 +39,7 @@ void HELPER(hlt)(CPULM32State *env)
void HELPER(ill)(CPULM32State *env)
{
#ifndef CONFIG_USER_ONLY
- CPUState *cs = CPU(lm32_env_get_cpu(env));
+ CPUState *cs = env_cpu(env);
fprintf(stderr, "VM paused due to illegal instruction. "
"Connect a debugger or switch to the monitor console "
"to find out more.\n");
diff --git a/target/lm32/translate.c b/target/lm32/translate.c
index f0e0e7058e..b9f2f2c4a7 100644
--- a/target/lm32/translate.c
+++ b/target/lm32/translate.c
@@ -1053,7 +1053,7 @@ static inline void decode(DisasContext *dc, uint32_t ir)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
{
CPULM32State *env = cs->env_ptr;
- LM32CPU *cpu = lm32_env_get_cpu(env);
+ LM32CPU *cpu = env_archcpu(env);
struct DisasContext ctx, *dc = &ctx;
uint32_t pc_start;
uint32_t page_start;
--
2.17.1
next prev parent reply other threads:[~2019-06-10 2:14 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-10 2:01 [Qemu-devel] [PULL 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 01/39] tcg: Fold CPUTLBWindow into CPUTLBDesc Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 02/39] tcg: Split out target/arch/cpu-param.h Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 03/39] tcg: Create struct CPUTLB Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 04/39] cpu: Define CPUArchState with typedef Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 05/39] cpu: Define ArchCPU Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 06/39] cpu: Replace ENV_GET_CPU with env_cpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 07/39] cpu: Introduce env_archcpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 08/39] target/alpha: Use env_cpu, env_archcpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 09/39] target/arm: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 10/39] target/cris: Reindent mmu.c Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 11/39] target/cris: Reindent op_helper.c Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 12/39] target/cris: Use env_cpu, env_archcpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 13/39] target/hppa: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 14/39] target/i386: " Richard Henderson
2019-06-10 2:01 ` Richard Henderson [this message]
2019-06-10 2:01 ` [Qemu-devel] [PULL 16/39] target/m68k: Use env_cpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 17/39] target/microblaze: Use env_cpu, env_archcpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 18/39] target/mips: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 19/39] target/moxie: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 20/39] target/nios2: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 21/39] target/openrisc: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 22/39] target/ppc: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 23/39] target/riscv: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 24/39] target/s390x: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 25/39] target/sh4: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 26/39] target/sparc: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 27/39] target/tilegx: Use env_cpu Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 28/39] target/tricore: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 29/39] target/unicore32: Use env_cpu, env_archcpu Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 30/39] target/xtensa: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 31/39] cpu: Move ENV_OFFSET to exec/gen-icount.h Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 32/39] cpu: Introduce cpu_set_cpustate_pointers Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 33/39] cpu: Introduce CPUNegativeOffsetState Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 34/39] cpu: Move icount_decr to CPUNegativeOffsetState Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 35/39] cpu: Move the softmmu tlb " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 36/39] cpu: Remove CPU_COMMON Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 37/39] tcg/aarch64: Use LDP to load tlb mask+table Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 38/39] tcg/arm: Use LDRD " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 39/39] tcg/arm: Remove mostly unreachable tlb special case Richard Henderson
2019-06-10 2:51 ` [Qemu-devel] [PULL 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState no-reply
2019-06-10 4:00 ` no-reply
2019-06-10 5:06 ` no-reply
2019-06-10 13:47 ` Peter Maydell
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