From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 21/39] target/openrisc: Use env_cpu, env_archcpu
Date: Sun, 9 Jun 2019 19:02:00 -0700 [thread overview]
Message-ID: <20190610020218.9228-22-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190610020218.9228-1-richard.henderson@linaro.org>
Cleanup in the boilerplate that each target must define.
Replace openrisc_env_get_cpu with env_archcpu. The combination
CPU(openrisc_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/openrisc/cpu.h | 5 -----
linux-user/openrisc/cpu_loop.c | 2 +-
target/openrisc/exception_helper.c | 5 ++---
target/openrisc/sys_helper.c | 8 ++++----
4 files changed, 7 insertions(+), 13 deletions(-)
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index 50f79d540b..9e46ac5266 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -317,11 +317,6 @@ typedef struct OpenRISCCPU {
} OpenRISCCPU;
-static inline OpenRISCCPU *openrisc_env_get_cpu(CPUOpenRISCState *env)
-{
- return container_of(env, OpenRISCCPU, env);
-}
-
#define ENV_OFFSET offsetof(OpenRISCCPU, env)
void cpu_openrisc_list(void);
diff --git a/linux-user/openrisc/cpu_loop.c b/linux-user/openrisc/cpu_loop.c
index f496e4b48a..4b8165b261 100644
--- a/linux-user/openrisc/cpu_loop.c
+++ b/linux-user/openrisc/cpu_loop.c
@@ -23,7 +23,7 @@
void cpu_loop(CPUOpenRISCState *env)
{
- CPUState *cs = CPU(openrisc_env_get_cpu(env));
+ CPUState *cs = env_cpu(env);
int trapnr;
abi_long ret;
target_siginfo_t info;
diff --git a/target/openrisc/exception_helper.c b/target/openrisc/exception_helper.c
index 0797cc9d38..d02a1cf0aa 100644
--- a/target/openrisc/exception_helper.c
+++ b/target/openrisc/exception_helper.c
@@ -25,15 +25,14 @@
void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp)
{
- OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
+ OpenRISCCPU *cpu = env_archcpu(env);
raise_exception(cpu, excp);
}
static void QEMU_NORETURN do_range(CPUOpenRISCState *env, uintptr_t pc)
{
- OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
- CPUState *cs = CPU(cpu);
+ CPUState *cs = env_cpu(env);
cs->exception_index = EXCP_RANGE;
cpu_loop_exit_restore(cs, pc);
diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
index 05f66c455b..8f11cb8202 100644
--- a/target/openrisc/sys_helper.c
+++ b/target/openrisc/sys_helper.c
@@ -30,8 +30,8 @@
void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb)
{
#ifndef CONFIG_USER_ONLY
- OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
- CPUState *cs = CPU(cpu);
+ OpenRISCCPU *cpu = env_archcpu(env);
+ CPUState *cs = env_cpu(env);
target_ulong mr;
int idx;
@@ -194,8 +194,8 @@ target_ulong HELPER(mfspr)(CPUOpenRISCState *env, target_ulong rd,
target_ulong spr)
{
#ifndef CONFIG_USER_ONLY
- OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
- CPUState *cs = CPU(cpu);
+ OpenRISCCPU *cpu = env_archcpu(env);
+ CPUState *cs = env_cpu(env);
int idx;
switch (spr) {
--
2.17.1
next prev parent reply other threads:[~2019-06-10 2:24 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-10 2:01 [Qemu-devel] [PULL 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 01/39] tcg: Fold CPUTLBWindow into CPUTLBDesc Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 02/39] tcg: Split out target/arch/cpu-param.h Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 03/39] tcg: Create struct CPUTLB Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 04/39] cpu: Define CPUArchState with typedef Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 05/39] cpu: Define ArchCPU Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 06/39] cpu: Replace ENV_GET_CPU with env_cpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 07/39] cpu: Introduce env_archcpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 08/39] target/alpha: Use env_cpu, env_archcpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 09/39] target/arm: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 10/39] target/cris: Reindent mmu.c Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 11/39] target/cris: Reindent op_helper.c Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 12/39] target/cris: Use env_cpu, env_archcpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 13/39] target/hppa: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 14/39] target/i386: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 15/39] target/lm32: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 16/39] target/m68k: Use env_cpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 17/39] target/microblaze: Use env_cpu, env_archcpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 18/39] target/mips: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 19/39] target/moxie: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 20/39] target/nios2: " Richard Henderson
2019-06-10 2:02 ` Richard Henderson [this message]
2019-06-10 2:02 ` [Qemu-devel] [PULL 22/39] target/ppc: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 23/39] target/riscv: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 24/39] target/s390x: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 25/39] target/sh4: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 26/39] target/sparc: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 27/39] target/tilegx: Use env_cpu Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 28/39] target/tricore: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 29/39] target/unicore32: Use env_cpu, env_archcpu Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 30/39] target/xtensa: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 31/39] cpu: Move ENV_OFFSET to exec/gen-icount.h Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 32/39] cpu: Introduce cpu_set_cpustate_pointers Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 33/39] cpu: Introduce CPUNegativeOffsetState Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 34/39] cpu: Move icount_decr to CPUNegativeOffsetState Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 35/39] cpu: Move the softmmu tlb " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 36/39] cpu: Remove CPU_COMMON Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 37/39] tcg/aarch64: Use LDP to load tlb mask+table Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 38/39] tcg/arm: Use LDRD " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 39/39] tcg/arm: Remove mostly unreachable tlb special case Richard Henderson
2019-06-10 2:51 ` [Qemu-devel] [PULL 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState no-reply
2019-06-10 4:00 ` no-reply
2019-06-10 5:06 ` no-reply
2019-06-10 13:47 ` Peter Maydell
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