From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 39/39] tcg/arm: Remove mostly unreachable tlb special case
Date: Sun, 9 Jun 2019 19:02:18 -0700 [thread overview]
Message-ID: <20190610020218.9228-40-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190610020218.9228-1-richard.henderson@linaro.org>
There was nothing armv7 specific about the bic+cmp sequence, however
looking at the set of guests more closely shows that the 8-bit immediate
operand for the bic can only be satisfied with one guest in tree:
baseline m-profile -- 10-bit pages with aligned 4-byte memory ops.
Therefore it does not seem useful to keep this path.
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/arm/tcg-target.inc.c | 23 ++++++++++++-----------
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index 276e843627..ece88dc2eb 100644
--- a/tcg/arm/tcg-target.inc.c
+++ b/tcg/arm/tcg-target.inc.c
@@ -1290,19 +1290,20 @@ static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
tcg_out_ld32_12(s, COND_AL, TCG_REG_R1, TCG_REG_R1,
offsetof(CPUTLBEntry, addend));
- /* Check alignment, check comparators. */
- if (use_armv7_instructions) {
+ /*
+ * Check alignment, check comparators.
+ * Do this in no more than 3 insns. Use MOVW for v7, if possible,
+ * to reduce the number of sequential conditional instructions.
+ * Almost all guests have at least 4k pages, which means that we need
+ * to clear at least 9 bits even for an 8-byte memory, which means it
+ * isn't worth checking for an immediate operand for BIC.
+ */
+ if (use_armv7_instructions && TARGET_PAGE_BITS <= 16) {
tcg_target_ulong mask = ~(TARGET_PAGE_MASK | ((1 << a_bits) - 1));
- int rot = encode_imm(mask);
- if (rot >= 0) {
- tcg_out_dat_imm(s, COND_AL, ARITH_BIC, TCG_REG_TMP, addrlo,
- rotl(mask, rot) | (rot << 7));
- } else {
- tcg_out_movi32(s, COND_AL, TCG_REG_TMP, mask);
- tcg_out_dat_reg(s, COND_AL, ARITH_BIC, TCG_REG_TMP,
- addrlo, TCG_REG_TMP, 0);
- }
+ tcg_out_movi32(s, COND_AL, TCG_REG_TMP, mask);
+ tcg_out_dat_reg(s, COND_AL, ARITH_BIC, TCG_REG_TMP,
+ addrlo, TCG_REG_TMP, 0);
tcg_out_dat_reg(s, COND_AL, ARITH_CMP, 0, TCG_REG_R2, TCG_REG_TMP, 0);
} else {
if (a_bits) {
--
2.17.1
next prev parent reply other threads:[~2019-06-10 2:47 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-10 2:01 [Qemu-devel] [PULL 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 01/39] tcg: Fold CPUTLBWindow into CPUTLBDesc Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 02/39] tcg: Split out target/arch/cpu-param.h Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 03/39] tcg: Create struct CPUTLB Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 04/39] cpu: Define CPUArchState with typedef Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 05/39] cpu: Define ArchCPU Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 06/39] cpu: Replace ENV_GET_CPU with env_cpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 07/39] cpu: Introduce env_archcpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 08/39] target/alpha: Use env_cpu, env_archcpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 09/39] target/arm: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 10/39] target/cris: Reindent mmu.c Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 11/39] target/cris: Reindent op_helper.c Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 12/39] target/cris: Use env_cpu, env_archcpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 13/39] target/hppa: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 14/39] target/i386: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 15/39] target/lm32: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 16/39] target/m68k: Use env_cpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 17/39] target/microblaze: Use env_cpu, env_archcpu Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 18/39] target/mips: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 19/39] target/moxie: " Richard Henderson
2019-06-10 2:01 ` [Qemu-devel] [PULL 20/39] target/nios2: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 21/39] target/openrisc: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 22/39] target/ppc: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 23/39] target/riscv: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 24/39] target/s390x: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 25/39] target/sh4: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 26/39] target/sparc: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 27/39] target/tilegx: Use env_cpu Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 28/39] target/tricore: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 29/39] target/unicore32: Use env_cpu, env_archcpu Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 30/39] target/xtensa: " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 31/39] cpu: Move ENV_OFFSET to exec/gen-icount.h Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 32/39] cpu: Introduce cpu_set_cpustate_pointers Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 33/39] cpu: Introduce CPUNegativeOffsetState Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 34/39] cpu: Move icount_decr to CPUNegativeOffsetState Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 35/39] cpu: Move the softmmu tlb " Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 36/39] cpu: Remove CPU_COMMON Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 37/39] tcg/aarch64: Use LDP to load tlb mask+table Richard Henderson
2019-06-10 2:02 ` [Qemu-devel] [PULL 38/39] tcg/arm: Use LDRD " Richard Henderson
2019-06-10 2:02 ` Richard Henderson [this message]
2019-06-10 2:51 ` [Qemu-devel] [PULL 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState no-reply
2019-06-10 4:00 ` no-reply
2019-06-10 5:06 ` no-reply
2019-06-10 13:47 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190610020218.9228-40-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).