From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE5D1C43218 for ; Tue, 11 Jun 2019 12:20:16 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 995DF2089E for ; Tue, 11 Jun 2019 12:20:14 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 995DF2089E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:57274 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hafl2-0000Cy-9T for qemu-devel@archiver.kernel.org; Tue, 11 Jun 2019 08:20:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52412) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hafA5-00070q-9C for qemu-devel@nongnu.org; Tue, 11 Jun 2019 07:41:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1haf6x-0000xl-1r for qemu-devel@nongnu.org; Tue, 11 Jun 2019 07:38:44 -0400 Received: from mx1.redhat.com ([209.132.183.28]:53162) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1haf6w-0000vM-G7 for qemu-devel@nongnu.org; Tue, 11 Jun 2019 07:38:42 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 95D923086203; Tue, 11 Jun 2019 11:38:40 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.167]) by smtp.corp.redhat.com (Postfix) with ESMTPS id DBC8B60BF1; Tue, 11 Jun 2019 11:38:34 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Igor Mammedov Date: Tue, 11 Jun 2019 13:37:28 +0200 Message-Id: <20190611113731.16940-19-philmd@redhat.com> In-Reply-To: <20190611113731.16940-1-philmd@redhat.com> References: <20190611113731.16940-1-philmd@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Tue, 11 Jun 2019 11:38:40 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v19 18/21] hw/registerfields.h: Add 8bit and 16bit register macros X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yoshinori Sato , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , Richard Henderson , Alistair Francis Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Some RX peripheral using 8bit and 16bit registers. Added 8bit and 16bit APIs. Signed-off-by: Yoshinori Sato Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20190607091116.49044-11-ysato@users.sourceforge.jp> Tested-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson --- include/hw/registerfields.h | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/include/hw/registerfields.h b/include/hw/registerfields.h index 2659a58737..a0bb0654d6 100644 --- a/include/hw/registerfields.h +++ b/include/hw/registerfields.h @@ -22,6 +22,14 @@ enum { A_ ## reg =3D (addr) }; = \ enum { R_ ## reg =3D (addr) / 4 }; =20 +#define REG8(reg, addr) = \ + enum { A_ ## reg =3D (addr) }; = \ + enum { R_ ## reg =3D (addr) }; + +#define REG16(reg, addr) = \ + enum { A_ ## reg =3D (addr) }; = \ + enum { R_ ## reg =3D (addr) / 2 }; + /* Define SHIFT, LENGTH and MASK constants for a field within a register= */ =20 /* This macro will define R_FOO_BAR_MASK, R_FOO_BAR_SHIFT and R_FOO_BAR_= LENGTH @@ -34,6 +42,12 @@ MAKE_64BIT_MASK(shift, length)}; =20 /* Extract a field from a register */ +#define FIELD_EX8(storage, reg, field) = \ + extract8((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ + R_ ## reg ## _ ## field ## _LENGTH) +#define FIELD_EX16(storage, reg, field) = \ + extract16((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ + R_ ## reg ## _ ## field ## _LENGTH) #define FIELD_EX32(storage, reg, field) = \ extract32((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ R_ ## reg ## _ ## field ## _LENGTH) @@ -49,6 +63,22 @@ * Assigning values larger then the target field will result in * compilation warnings. */ +#define FIELD_DP8(storage, reg, field, val) ({ = \ + struct { = \ + unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; = \ + } v =3D { .v =3D val }; = \ + uint8_t d; = \ + d =3D deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ + R_ ## reg ## _ ## field ## _LENGTH, v.v); = \ + d; }) +#define FIELD_DP16(storage, reg, field, val) ({ = \ + struct { = \ + unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; = \ + } v =3D { .v =3D val }; = \ + uint16_t d; = \ + d =3D deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ + R_ ## reg ## _ ## field ## _LENGTH, v.v); = \ + d; }) #define FIELD_DP32(storage, reg, field, val) ({ = \ struct { = \ unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; = \ @@ -57,7 +87,7 @@ d =3D deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, = \ R_ ## reg ## _ ## field ## _LENGTH, v.v); = \ d; }) -#define FIELD_DP64(storage, reg, field, val) ({ = \ +#define FIELD_DP64(storage, reg, field, val) ({ = \ struct { = \ unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; = \ } v =3D { .v =3D val }; = \ --=20 2.20.1