From: Like Xu <like.xu@linux.intel.com>
To: qemu-devel@nongnu.org, Eduardo Habkost <ehabkost@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
"Dr . David Alan Gilbert" <dgilbert@redhat.com>,
like.xu@linux.intel.com
Subject: [Qemu-devel] [PATCH v3 1/9] i386: Add die-level cpu topology to x86CPU on PCMachine
Date: Wed, 12 Jun 2019 16:40:56 +0800 [thread overview]
Message-ID: <20190612084104.34984-2-like.xu@linux.intel.com> (raw)
In-Reply-To: <20190612084104.34984-1-like.xu@linux.intel.com>
The die-level as the first PC-specific cpu topology is added to the leagcy
cpu topology model, which has one die per package implicitly and only the
numbers of sockets/cores/threads are configurable.
In the new model with die-level support, the total number of logical
processors (including offline) on board will be calculated as:
#cpus = #sockets * #dies * #cores * #threads
and considering compatibility, the default value for #dies would be
initialized to one in x86_cpu_initfn() and pc_machine_initfn().
Signed-off-by: Like Xu <like.xu@linux.intel.com>
---
hw/i386/pc.c | 9 +++++++--
include/hw/i386/pc.h | 2 ++
target/i386/cpu.c | 1 +
target/i386/cpu.h | 2 ++
4 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 12c1e08b85..9e9a42f007 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -2308,9 +2308,13 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
return;
}
- /* if APIC ID is not set, set it based on socket/core/thread properties */
+ /*
+ * If APIC ID is not set,
+ * set it based on socket/die/core/thread properties.
+ */
if (cpu->apic_id == UNASSIGNED_APIC_ID) {
- int max_socket = (ms->smp.max_cpus - 1) / smp_threads / smp_cores;
+ int max_socket = (ms->smp.max_cpus - 1) /
+ smp_threads / smp_cores / pcms->smp_dies;
if (cpu->socket_id < 0) {
error_setg(errp, "CPU socket-id is not set");
@@ -2620,6 +2624,7 @@ static void pc_machine_initfn(Object *obj)
pcms->smbus_enabled = true;
pcms->sata_enabled = true;
pcms->pit_enabled = true;
+ pcms->smp_dies = 1;
pc_system_flash_create(pcms);
}
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index b260262640..fae9217e34 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -24,6 +24,7 @@
* PCMachineState:
* @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
* @boot_cpus: number of present VCPUs
+ * @smp_dies: number of dies per one package
*/
struct PCMachineState {
/*< private >*/
@@ -59,6 +60,7 @@ struct PCMachineState {
bool apic_xrupt_override;
unsigned apic_id_limit;
uint16_t boot_cpus;
+ unsigned smp_dies;
/* NUMA information: */
uint64_t numa_nodes;
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 23119699de..a16be205fe 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5619,6 +5619,7 @@ static void x86_cpu_initfn(Object *obj)
CPUX86State *env = &cpu->env;
FeatureWord w;
+ env->nr_dies = 1;
cpu_set_cpustate_pointers(cpu);
object_property_add(obj, "family", "int",
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index edad6e1efb..5daa2eeafa 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1349,6 +1349,8 @@ typedef struct CPUX86State {
uint64_t xss;
TPRAccess tpr_access_type;
+
+ unsigned nr_dies;
} CPUX86State;
struct kvm_msrs;
--
2.21.0
next prev parent reply other threads:[~2019-06-12 8:52 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-12 8:40 [Qemu-devel] [PATCH v3 0/9] Introduce cpu die topology and enable CPUID.1F for i386 Like Xu
2019-06-12 8:40 ` Like Xu [this message]
2019-06-19 18:50 ` [Qemu-devel] [PATCH v3 1/9] i386: Add die-level cpu topology to x86CPU on PCMachine Eduardo Habkost
2019-06-12 8:40 ` [Qemu-devel] [PATCH v3 2/9] hw/i386: Adjust nr_dies with configured smp_dies for PCMachine Like Xu
2019-06-19 18:51 ` Eduardo Habkost
2019-06-12 8:40 ` [Qemu-devel] [PATCH v3 3/9] i386/cpu: Consolidate die-id validity in smp context Like Xu
2019-06-19 19:04 ` Eduardo Habkost
2019-06-12 8:40 ` [Qemu-devel] [PATCH v3 4/9] i386: Update new x86_apicid parsing rules with die_offset support Like Xu
2019-06-19 19:09 ` Eduardo Habkost
2019-06-12 8:41 ` [Qemu-devel] [PATCH v3 5/9] tests/x86-cpuid: Update testcases in test_topo_bits() with multiple dies Like Xu
2019-06-19 19:10 ` Eduardo Habkost
2019-06-12 8:41 ` [Qemu-devel] [PATCH v3 6/9] i386/cpu: Add CPUID.1F generation support for multi-dies PCMachine Like Xu
2019-06-19 19:11 ` Eduardo Habkost
2019-06-19 23:21 ` Eduardo Habkost
2019-06-12 8:41 ` [Qemu-devel] [PATCH v3 7/9] target/i386: Support multi-dies when host doesn't support CPUID.1F Like Xu
2019-06-19 19:15 ` Eduardo Habkost
2019-06-19 23:36 ` Eduardo Habkost
2019-06-20 2:03 ` Like Xu
2019-06-20 3:29 ` Eduardo Habkost
2019-06-12 8:41 ` [Qemu-devel] [PATCH v3 8/9] machine: Refactor smp_parse() in vl.c as MachineClass::smp_parse() Like Xu
2019-06-19 19:24 ` Eduardo Habkost
2019-06-12 8:41 ` [Qemu-devel] [PATCH v3 9/9] vl.c: Add -smp, dies=* command line support and update doc Like Xu
2019-06-19 19:25 ` Eduardo Habkost
2019-06-19 3:05 ` [Qemu-devel] [PATCH v3 0/9] Introduce cpu die topology and enable CPUID.1F for i386 Like Xu
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