From: Yoshinori Sato <ysato@users.sourceforge.jp>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, imammedo@redhat.com,
richard.henderson@linaro.org,
Yoshinori Sato <ysato@users.sourceforge.jp>,
philmd@redhat.com
Subject: [Qemu-devel] [PATCH v21 02/21] qemu/bitops.h: Add extract8 and extract16
Date: Tue, 18 Jun 2019 23:10:41 +0900 [thread overview]
Message-ID: <20190618141118.52955-3-ysato@users.sourceforge.jp> (raw)
In-Reply-To: <20190618141118.52955-1-ysato@users.sourceforge.jp>
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190607091116.49044-10-ysato@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/qemu/bitops.h | 38 ++++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h
index 3f0926cf40..764f9d1ea0 100644
--- a/include/qemu/bitops.h
+++ b/include/qemu/bitops.h
@@ -301,6 +301,44 @@ static inline uint32_t extract32(uint32_t value, int start, int length)
}
/**
+ * extract8:
+ * @value: the value to extract the bit field from
+ * @start: the lowest bit in the bit field (numbered from 0)
+ * @length: the length of the bit field
+ *
+ * Extract from the 8 bit input @value the bit field specified by the
+ * @start and @length parameters, and return it. The bit field must
+ * lie entirely within the 8 bit word. It is valid to request that
+ * all 8 bits are returned (ie @length 8 and @start 0).
+ *
+ * Returns: the value of the bit field extracted from the input value.
+ */
+static inline uint8_t extract8(uint8_t value, int start, int length)
+{
+ assert(start >= 0 && length > 0 && length <= 8 - start);
+ return extract32(value, start, length);
+}
+
+/**
+ * extract16:
+ * @value: the value to extract the bit field from
+ * @start: the lowest bit in the bit field (numbered from 0)
+ * @length: the length of the bit field
+ *
+ * Extract from the 16 bit input @value the bit field specified by the
+ * @start and @length parameters, and return it. The bit field must
+ * lie entirely within the 16 bit word. It is valid to request that
+ * all 16 bits are returned (ie @length 16 and @start 0).
+ *
+ * Returns: the value of the bit field extracted from the input value.
+ */
+static inline uint16_t extract16(uint16_t value, int start, int length)
+{
+ assert(start >= 0 && length > 0 && length <= 16 - start);
+ return extract32(value, start, length);
+}
+
+/**
* extract64:
* @value: the value to extract the bit field from
* @start: the lowest bit in the bit field (numbered from 0)
--
2.11.0
next prev parent reply other threads:[~2019-06-18 14:18 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-18 14:10 [Qemu-devel] [PATCH v21 00/21] Add RX archtecture support Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 01/21] MAINTAINERS: Add RX Yoshinori Sato
2019-06-18 14:10 ` Yoshinori Sato [this message]
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 02/21] target/rx: TCG translation Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 03/21] hw/registerfields.h: Add 8bit and 16bit register macros Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 03/21] target/rx: TCG helper Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 04/21] target/rx: CPU definition Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 04/21] target/rx: TCG translation Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 05/21] target/rx: RX disassembler Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 05/21] target/rx: TCG helper Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 06/21] target/rx: CPU definition Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 06/21] target/rx: Disassemble rx_index_addr into a string Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 07/21] target/rx: RX disassembler Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 07/21] target/rx: Replace operand with prt_ldmi in disassembler Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 08/21] target/rx: Disassemble rx_index_addr into a string Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 08/21] target/rx: Use prt_ldmi for XCHG_mr disassembly Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 09/21] target/rx: Emit all disassembly in one prt() Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 09/21] target/rx: Replace operand with prt_ldmi in disassembler Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 10/21] target/rx: Collect all bytes during disassembly Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 10/21] target/rx: Use prt_ldmi for XCHG_mr disassembly Yoshinori Sato
2019-06-18 14:10 ` [Qemu-devel] [PATCH v21 11/21] target/rx: Dump bytes for each insn during disassembly Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 11/21] target/rx: Emit all disassembly in one prt() Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 12/21] hw/intc: RX62N interrupt controller (ICUa) Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 12/21] target/rx: Collect all bytes during disassembly Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 13/21] hw/timer: RX62N internal timer modules Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 13/21] target/rx: Dump bytes for each insn during disassembly Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 14/21] hw/char: RX62N serial communication interface (SCI) Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 14/21] hw/intc: RX62N interrupt controller (ICUa) Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 15/21] hw/rx: RX Target hardware definition Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 15/21] hw/timer: RX62N internal timer modules Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 16/21] hw/char: RX62N serial communication interface (SCI) Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 16/21] hw/rx: Honor -accel qtest Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 17/21] hw/rx: RX Target hardware definition Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 17/21] hw/rx: Restrict the RX62N microcontroller to the RX62N CPU core Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 18/21] hw/rx: Honor -accel qtest Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 18/21] qemu/bitops.h: Add extract8 and extract16 Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 19/21] hw/registerfields.h: Add 8bit and 16bit register macros Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 19/21] hw/rx: Restrict the RX62N microcontroller to the RX62N CPU core Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 20/21] Add rx-softmmu Yoshinori Sato
2019-06-18 14:11 ` [Qemu-devel] [PATCH v21 21/21] BootLinuxConsoleTest: Test the RX-Virt machine Yoshinori Sato
2019-06-18 14:38 ` [Qemu-devel] [PATCH v21 00/21] Add RX archtecture support Yoshinori Sato
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