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[173.166.0.186]) by smtp.gmail.com with ESMTPSA id r39sm16438930qtc.87.2019.06.20.08.31.16 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 20 Jun 2019 08:31:17 -0700 (PDT) Date: Thu, 20 Jun 2019 11:31:15 -0400 From: "Michael S. Tsirkin" To: Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= Message-ID: <20190620112913-mutt-send-email-mst@kernel.org> References: <20190613143446.23937-1-philmd@redhat.com> <20190613143446.23937-5-philmd@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20190613143446.23937-5-philmd@redhat.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.160.193 Subject: Re: [Qemu-devel] [PATCH v2 04/20] hw/i386/pc: Add the E820Type enum type X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , kvm@vger.kernel.org, Marcelo Tosatti , qemu-devel@nongnu.org, Rob Bradford , Paolo Bonzini , Samuel Ortiz , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Thu, Jun 13, 2019 at 04:34:30PM +0200, Philippe Mathieu-Daudé wrote: > This ensure we won't use an incorrect value. > > Signed-off-by: Philippe Mathieu-Daudé It doesn't actually ensure anything: compiler does not check IIUC. And OTOH it's stored in type field in struct e820_entry. > --- > v2: Do not cast the enum (Li) > --- > hw/i386/pc.c | 4 ++-- > include/hw/i386/pc.h | 16 ++++++++++------ > 2 files changed, 12 insertions(+), 8 deletions(-) > > diff --git a/hw/i386/pc.c b/hw/i386/pc.c > index 5a7cffbb1a..86ba554439 100644 > --- a/hw/i386/pc.c > +++ b/hw/i386/pc.c > @@ -872,7 +872,7 @@ static void handle_a20_line_change(void *opaque, int irq, int level) > x86_cpu_set_a20(cpu, level); > } > > -ssize_t e820_add_entry(uint64_t address, uint64_t length, uint32_t type) > +ssize_t e820_add_entry(uint64_t address, uint64_t length, E820Type type) > { > unsigned int index = le32_to_cpu(e820_reserve.count); > struct e820_entry *entry; > @@ -906,7 +906,7 @@ size_t e820_get_num_entries(void) > return e820_entries; > } > > -bool e820_get_entry(unsigned int idx, uint32_t type, > +bool e820_get_entry(unsigned int idx, E820Type type, > uint64_t *address, uint64_t *length) > { > if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) { > diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h > index c56116e6f6..7c07185dd5 100644 > --- a/include/hw/i386/pc.h > +++ b/include/hw/i386/pc.h > @@ -282,12 +282,16 @@ void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); > void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, > const CPUArchIdList *apic_ids, GArray *entry); > > -/* e820 types */ > -#define E820_RAM 1 > -#define E820_RESERVED 2 > -#define E820_ACPI 3 > -#define E820_NVS 4 > -#define E820_UNUSABLE 5 > +/** > + * E820Type: Type of the e820 address range. > + */ > +typedef enum { > + E820_RAM = 1, > + E820_RESERVED = 2, > + E820_ACPI = 3, > + E820_NVS = 4, > + E820_UNUSABLE = 5 > +} E820Type; > > ssize_t e820_add_entry(uint64_t, uint64_t, uint32_t); > size_t e820_get_num_entries(void); > -- > 2.20.1