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[88.21.202.183]) by smtp.gmail.com with ESMTPSA id l1sm646781wmg.13.2019.06.24.15.28.54 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 24 Jun 2019 15:28:54 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 25 Jun 2019 00:28:41 +0200 Message-Id: <20190624222844.26584-8-f4bug@amsat.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190624222844.26584-1-f4bug@amsat.org> References: <20190624222844.26584-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 Subject: [Qemu-devel] [PATCH 07/10] hw/mips/gt64xxx_pci: Align the pci0-mem size X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Thomas Huth , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Artyom Tarasenko , Aleksandar Markovic , Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" One byte is missing, use an aligned size. (qemu) info mtree memory-region: pci0-mem 0000000000000000-00000000fffffffe (prio 0, i/o): pci0-mem ^ Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/gt64xxx_pci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 815ef0711d..2fa313f498 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -23,6 +23,7 @@ */ #include "qemu/osdep.h" +#include "qemu/units.h" #include "qemu/log.h" #include "hw/hw.h" #include "hw/mips/mips.h" @@ -1201,7 +1202,7 @@ PCIBus *gt64120_register(qemu_irq *pic) dev = qdev_create(NULL, TYPE_GT64120_PCI_HOST_BRIDGE); d = GT64120_PCI_HOST_BRIDGE(dev); phb = PCI_HOST_BRIDGE(dev); - memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", UINT32_MAX); + memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", 4 * GiB); address_space_init(&d->pci0_mem_as, &d->pci0_mem, "pci0-mem"); phb->bus = pci_register_root_bus(dev, "pci", gt64120_pci_set_irq, gt64120_pci_map_irq, -- 2.19.1