From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D413C0650E for ; Mon, 1 Jul 2019 13:52:07 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 623F1214AE for ; Mon, 1 Jul 2019 13:52:07 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 623F1214AE Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:59014 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwj0-0000ru-KT for qemu-devel@archiver.kernel.org; Mon, 01 Jul 2019 09:52:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41316) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hhwKu-0002dJ-2l for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:27:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hhwKl-0002X4-VQ for qemu-devel@nongnu.org; Mon, 01 Jul 2019 09:27:10 -0400 Received: from mx1.redhat.com ([209.132.183.28]:48814) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hhwKe-00028j-9S; Mon, 01 Jul 2019 09:26:56 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 088543091786; Mon, 1 Jul 2019 13:26:41 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.170]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 0D9306085B; Mon, 1 Jul 2019 13:26:35 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 15:25:07 +0200 Message-Id: <20190701132516.26392-19-philmd@redhat.com> In-Reply-To: <20190701132516.26392-1-philmd@redhat.com> References: <20190701132516.26392-1-philmd@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.41]); Mon, 01 Jul 2019 13:26:41 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 18/27] target/arm: Restrict semi-hosting to TCG X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Peter Maydell , Andrew Jones , Samuel Ortiz , Rob Bradford , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Per Peter Maydell: Semihosting hooks either SVC or HLT instructions, and inside KVM both of those go to EL1, ie to the guest, and can't be trapped to KVM. Let check_for_semihosting() return False when not running on TCG. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- v3: inline call to g_assert_not_reached if !TCG --- target/arm/Makefile.objs | 2 +- target/arm/cpu.h | 7 +++++++ target/arm/helper.c | 4 +++- 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/target/arm/Makefile.objs b/target/arm/Makefile.objs index 294433da88..82bedefc3d 100644 --- a/target/arm/Makefile.objs +++ b/target/arm/Makefile.objs @@ -1,4 +1,4 @@ -obj-y +=3D arm-semi.o +obj-$(CONFIG_TCG) +=3D arm-semi.o obj-y +=3D helper.o vfp_helper.o obj-y +=3D cpu.o gdbstub.o obj-$(TARGET_AARCH64) +=3D cpu64.o gdbstub64.o diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a9be18660f..94c990cddb 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -964,7 +964,14 @@ static inline void aarch64_sve_change_el(CPUARMState= *env, int o, { } #endif =20 +#if !defined(CONFIG_TCG) +static inline target_ulong do_arm_semihosting(CPUARMState *env) +{ + g_assert_not_reached(); +} +#else target_ulong do_arm_semihosting(CPUARMState *env); +#endif void aarch64_sync_32_to_64(CPUARMState *env); void aarch64_sync_64_to_32(CPUARMState *env); =20 diff --git a/target/arm/helper.c b/target/arm/helper.c index 49a0f05cd1..1b4da7aa45 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -20,7 +20,6 @@ #include "qemu/qemu-print.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" -#include "arm_ldst.h" #include /* For crc32 */ #include "hw/semihosting/semihost.h" #include "sysemu/cpus.h" @@ -29,6 +28,9 @@ #include "qapi/qapi-commands-target.h" #include "qapi/error.h" #include "qemu/guest-random.h" +#ifdef CONFIG_TCG +#include "arm_ldst.h" +#endif =20 #define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable = */ =20 --=20 2.20.1