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From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Yang Zhong" <yang.zhong@intel.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Andrew Jones" <drjones@redhat.com>,
	"Samuel Ortiz" <sameo@linux.intel.com>,
	"Rob Bradford" <robert.bradford@intel.com>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	qemu-arm@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
	"Alex Bennée" <alex.bennee@linaro.org>
Subject: [Qemu-devel] [PATCH v3 20/27] target/arm: Declare arm_log_exception() function publicly
Date: Mon,  1 Jul 2019 15:25:09 +0200	[thread overview]
Message-ID: <20190701132516.26392-21-philmd@redhat.com> (raw)
In-Reply-To: <20190701132516.26392-1-philmd@redhat.com>

In few commits we will split the M-profile functions from this
file, and this function will also be called in the new file.
Declare it in the "internals.h" header.
Since it is in the middle of a block of M profile functions,
move it previous to this block to ease the later refactor.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 target/arm/helper.c    | 76 +++++++++++++++++++++---------------------
 target/arm/internals.h |  2 ++
 2 files changed, 40 insertions(+), 38 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 1b4da7aa45..515a82af57 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -7697,6 +7697,44 @@ uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx,
     return target_el;
 }
 
+void arm_log_exception(int idx)
+{
+    if (qemu_loglevel_mask(CPU_LOG_INT)) {
+        const char *exc = NULL;
+        static const char * const excnames[] = {
+            [EXCP_UDEF] = "Undefined Instruction",
+            [EXCP_SWI] = "SVC",
+            [EXCP_PREFETCH_ABORT] = "Prefetch Abort",
+            [EXCP_DATA_ABORT] = "Data Abort",
+            [EXCP_IRQ] = "IRQ",
+            [EXCP_FIQ] = "FIQ",
+            [EXCP_BKPT] = "Breakpoint",
+            [EXCP_EXCEPTION_EXIT] = "QEMU v7M exception exit",
+            [EXCP_KERNEL_TRAP] = "QEMU intercept of kernel commpage",
+            [EXCP_HVC] = "Hypervisor Call",
+            [EXCP_HYP_TRAP] = "Hypervisor Trap",
+            [EXCP_SMC] = "Secure Monitor Call",
+            [EXCP_VIRQ] = "Virtual IRQ",
+            [EXCP_VFIQ] = "Virtual FIQ",
+            [EXCP_SEMIHOST] = "Semihosting call",
+            [EXCP_NOCP] = "v7M NOCP UsageFault",
+            [EXCP_INVSTATE] = "v7M INVSTATE UsageFault",
+            [EXCP_STKOF] = "v8M STKOF UsageFault",
+            [EXCP_LAZYFP] = "v7M exception during lazy FP stacking",
+            [EXCP_LSERR] = "v8M LSERR UsageFault",
+            [EXCP_UNALIGNED] = "v7M UNALIGNED UsageFault",
+        };
+
+        if (idx >= 0 && idx < ARRAY_SIZE(excnames)) {
+            exc = excnames[idx];
+        }
+        if (!exc) {
+            exc = "unknown";
+        }
+        qemu_log_mask(CPU_LOG_INT, "Taking exception %d [%s]\n", idx, exc);
+    }
+}
+
 /*
  * Return true if the v7M CPACR permits access to the FPU for the specified
  * security state and privilege level.
@@ -9436,44 +9474,6 @@ static bool do_v7m_function_return(ARMCPU *cpu)
     return true;
 }
 
-static void arm_log_exception(int idx)
-{
-    if (qemu_loglevel_mask(CPU_LOG_INT)) {
-        const char *exc = NULL;
-        static const char * const excnames[] = {
-            [EXCP_UDEF] = "Undefined Instruction",
-            [EXCP_SWI] = "SVC",
-            [EXCP_PREFETCH_ABORT] = "Prefetch Abort",
-            [EXCP_DATA_ABORT] = "Data Abort",
-            [EXCP_IRQ] = "IRQ",
-            [EXCP_FIQ] = "FIQ",
-            [EXCP_BKPT] = "Breakpoint",
-            [EXCP_EXCEPTION_EXIT] = "QEMU v7M exception exit",
-            [EXCP_KERNEL_TRAP] = "QEMU intercept of kernel commpage",
-            [EXCP_HVC] = "Hypervisor Call",
-            [EXCP_HYP_TRAP] = "Hypervisor Trap",
-            [EXCP_SMC] = "Secure Monitor Call",
-            [EXCP_VIRQ] = "Virtual IRQ",
-            [EXCP_VFIQ] = "Virtual FIQ",
-            [EXCP_SEMIHOST] = "Semihosting call",
-            [EXCP_NOCP] = "v7M NOCP UsageFault",
-            [EXCP_INVSTATE] = "v7M INVSTATE UsageFault",
-            [EXCP_STKOF] = "v8M STKOF UsageFault",
-            [EXCP_LAZYFP] = "v7M exception during lazy FP stacking",
-            [EXCP_LSERR] = "v8M LSERR UsageFault",
-            [EXCP_UNALIGNED] = "v7M UNALIGNED UsageFault",
-        };
-
-        if (idx >= 0 && idx < ARRAY_SIZE(excnames)) {
-            exc = excnames[idx];
-        }
-        if (!exc) {
-            exc = "unknown";
-        }
-        qemu_log_mask(CPU_LOG_INT, "Taking exception %d [%s]\n", idx, exc);
-    }
-}
-
 static bool v7m_read_half_insn(ARMCPU *cpu, ARMMMUIdx mmu_idx,
                                uint32_t addr, uint16_t *insn)
 {
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 57e0253ef4..11bfdba512 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -1000,6 +1000,8 @@ bool get_phys_addr(CPUARMState *env, target_ulong address,
                    target_ulong *page_size,
                    ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs);
 
+void arm_log_exception(int idx);
+
 #endif /* !CONFIG_USER_ONLY */
 
 #endif
-- 
2.20.1



  parent reply	other threads:[~2019-07-01 13:55 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-01 13:24 [Qemu-devel] [PATCH v3 00/27] Support disabling TCG on ARM Philippe Mathieu-Daudé
2019-07-01 13:24 ` [Qemu-devel] [PATCH v3 01/27] target/arm: Makefile cleanup (Aarch64) Philippe Mathieu-Daudé
2019-07-01 13:24 ` [Qemu-devel] [PATCH v3 02/27] target/arm: Makefile cleanup (ARM) Philippe Mathieu-Daudé
2019-07-01 13:24 ` [Qemu-devel] [PATCH v3 03/27] target/arm: Makefile cleanup (KVM) Philippe Mathieu-Daudé
2019-07-01 13:24 ` [Qemu-devel] [PATCH v3 04/27] target/arm: Makefile cleanup (softmmu) Philippe Mathieu-Daudé
2019-07-01 13:24 ` [Qemu-devel] [PATCH v3 05/27] target/arm: Add copyright boilerplate Philippe Mathieu-Daudé
2019-07-01 13:24 ` [Qemu-devel] [PATCH v3 06/27] target/arm/helper: Remove unused include Philippe Mathieu-Daudé
2019-07-01 13:24 ` [Qemu-devel] [PATCH v3 07/27] target/arm: Fix multiline comment syntax Philippe Mathieu-Daudé
2019-07-01 13:24 ` [Qemu-devel] [PATCH v3 08/27] target/arm: Fix coding style issues Philippe Mathieu-Daudé
2019-07-01 13:24 ` [Qemu-devel] [PATCH v3 09/27] target/arm: Move the DC ZVA helper into op_helper Philippe Mathieu-Daudé
2019-07-01 13:24 ` [Qemu-devel] [PATCH v3 10/27] target/arm: Move CPU state dumping routines to cpu.c Philippe Mathieu-Daudé
2019-07-01 13:25 ` [Qemu-devel] [PATCH v3 11/27] target/arm: Declare get_phys_addr() function publicly Philippe Mathieu-Daudé
2019-07-01 13:25 ` [Qemu-devel] [PATCH v3 12/27] target/arm: Move TLB related routines to tlb_helper.c Philippe Mathieu-Daudé
2019-07-01 13:25 ` [Qemu-devel] [PATCH v3 13/27] target/arm: Move debug routines to debug_helper.c Philippe Mathieu-Daudé
2019-07-01 15:19   ` Peter Maydell
2019-07-01 13:25 ` [Qemu-devel] [PATCH v3 14/27] target/arm/vfp_helper: Move code around Philippe Mathieu-Daudé
2019-07-01 13:25 ` [Qemu-devel] [PATCH v3 15/27] target/arm/vfp_helper: Extract vfp_set_fpscr_to_host() Philippe Mathieu-Daudé
2019-07-01 13:25 ` [Qemu-devel] [PATCH v3 16/27] target/arm/vfp_helper: Extract vfp_set_fpscr_from_host() Philippe Mathieu-Daudé
2019-07-01 13:25 ` [Qemu-devel] [PATCH v3 17/27] target/arm/vfp_helper: Restrict the SoftFloat use to TCG Philippe Mathieu-Daudé
2019-07-01 13:25 ` [Qemu-devel] [PATCH v3 18/27] target/arm: Restrict semi-hosting " Philippe Mathieu-Daudé
2019-07-01 15:25   ` Peter Maydell
2019-07-01 15:38     ` Philippe Mathieu-Daudé
2019-07-01 16:10       ` Philippe Mathieu-Daudé
2019-07-01 13:25 ` [Qemu-devel] [PATCH v3 19/27] target/arm: Restrict PSCI " Philippe Mathieu-Daudé
2019-07-01 13:25 ` Philippe Mathieu-Daudé [this message]
2019-07-01 13:25 ` [Qemu-devel] [PATCH v3 21/27] target/arm: Declare some M-profile functions publicly Philippe Mathieu-Daudé
2019-07-01 13:25 ` [Qemu-devel] [PATCH v3 22/27] target/arm/helper: Move M profile routines to m_helper.c Philippe Mathieu-Daudé
2019-07-01 13:25 ` [Qemu-devel] [RFC PATCH v3 23/27] target/arm: Restrict pre-ARMv7 cpus to TCG Philippe Mathieu-Daudé
2019-07-01 13:25 ` [Qemu-devel] [RFC PATCH v3 24/27] target/arm: Do not build pre-ARMv7 cpus when using KVM Philippe Mathieu-Daudé
2019-07-01 13:25 ` [Qemu-devel] [RFC PATCH v3 25/27] target/arm: Restrict R and M profiles to TCG Philippe Mathieu-Daudé
2019-07-01 13:25 ` [Qemu-devel] [RFC PATCH v3 26/27] target/arm: Do not build A/M-profile cpus when using KVM Philippe Mathieu-Daudé
2019-07-01 13:25 ` [Qemu-devel] [PATCH v3 27/27] target/arm: Do not build TCG objects when TCG is off Philippe Mathieu-Daudé
2019-07-01 15:41 ` [Qemu-devel] [PATCH v3 00/27] Support disabling TCG on ARM Peter Maydell
2019-07-01 15:44   ` Philippe Mathieu-Daudé
2019-07-01 15:51     ` Samuel Ortiz
2019-07-01 15:55     ` Peter Maydell
2019-07-01 18:41 ` no-reply
2019-07-01 21:15   ` Philippe Mathieu-Daudé

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