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From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Kevin Wolf" <kwolf@redhat.com>,
	"Laurent Vivier" <lvivier@redhat.com>,
	"Thomas Huth" <thuth@redhat.com>,
	"Stephen Checkoway" <stephen.checkoway@oberlin.edu>,
	qemu-block@nongnu.org, "Max Reitz" <mreitz@redhat.com>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [Qemu-devel] [PULL 12/27] hw/block/pflash_cfi02: Fix command address comparison
Date: Mon,  1 Jul 2019 21:58:57 -0300	[thread overview]
Message-ID: <20190702005912.15905-13-philmd@redhat.com> (raw)
In-Reply-To: <20190702005912.15905-1-philmd@redhat.com>

From: Stephen Checkoway <stephen.checkoway@oberlin.edu>

Most AMD commands only examine 11 bits of the address. This masks the
addresses used in the comparison to 11 bits. The exceptions are word or
sector addresses which use offset directly rather than the shifted
offset, boff.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-4-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 hw/block/pflash_cfi02.c   |  8 +++++++-
 tests/pflash-cfi02-test.c | 12 ++++++++++--
 2 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
index e64dc69c6c..4be3837be5 100644
--- a/hw/block/pflash_cfi02.c
+++ b/hw/block/pflash_cfi02.c
@@ -281,11 +281,13 @@ static void pflash_write(void *opaque, hwaddr offset, uint64_t value,
     }
     offset &= pfl->chip_len - 1;
 
-    boff = offset & (pfl->sector_len - 1);
+    boff = offset;
     if (pfl->width == 2)
         boff = boff >> 1;
     else if (pfl->width == 4)
         boff = boff >> 2;
+    /* Only the least-significant 11 bits are used in most cases. */
+    boff &= 0x7FF;
     switch (pfl->wcycle) {
     case 0:
         /* Set the device in I/O access mode if required */
@@ -538,6 +540,10 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp)
         }
     }
 
+    /* Only 11 bits are used in the comparison. */
+    pfl->unlock_addr0 &= 0x7FF;
+    pfl->unlock_addr1 &= 0x7FF;
+
     pflash_setup_mappings(pfl);
     pfl->rom_mode = 1;
     sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem);
diff --git a/tests/pflash-cfi02-test.c b/tests/pflash-cfi02-test.c
index e7e16a8dd8..e090b2e3a0 100644
--- a/tests/pflash-cfi02-test.c
+++ b/tests/pflash-cfi02-test.c
@@ -21,8 +21,8 @@
 
 #define FLASH_WIDTH 2
 #define CFI_ADDR (FLASH_WIDTH * 0x55)
-#define UNLOCK0_ADDR (FLASH_WIDTH * 0x5555)
-#define UNLOCK1_ADDR (FLASH_WIDTH * 0x2AAA)
+#define UNLOCK0_ADDR (FLASH_WIDTH * 0x555)
+#define UNLOCK1_ADDR (FLASH_WIDTH * 0x2AA)
 
 #define CFI_CMD 0x98
 #define UNLOCK0_CMD 0xAA
@@ -190,6 +190,14 @@ static void test_flash(void)
     g_assert_cmphex(flash_read(6), ==, 0xCDEF);
     g_assert_cmphex(flash_read(8), ==, 0xFFFF);
 
+    /* Test ignored high order bits of address. */
+    flash_write(FLASH_WIDTH * 0x5555, UNLOCK0_CMD);
+    flash_write(FLASH_WIDTH * 0x2AAA, UNLOCK1_CMD);
+    flash_write(FLASH_WIDTH * 0x5555, AUTOSELECT_CMD);
+    g_assert_cmpint(flash_read(FLASH_WIDTH * 0x0000), ==, 0x00BF);
+    g_assert_cmpint(flash_read(FLASH_WIDTH * 0x0001), ==, 0x236D);
+    reset();
+
     qtest_quit(global_qtest);
 }
 
-- 
2.20.1



  parent reply	other threads:[~2019-07-02  3:50 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-02  0:58 [Qemu-devel] [PULL 00/27] pflash-next patches Philippe Mathieu-Daudé
2019-07-02  0:58 ` [Qemu-devel] [PULL 01/27] tests/pflash-cfi02: Add test for supported CFI commands Philippe Mathieu-Daudé
2019-07-02  0:58 ` [Qemu-devel] [PULL 02/27] hw/block/pflash: Simplify trace_pflash_io_read/write() Philippe Mathieu-Daudé
2019-07-02  0:58 ` [Qemu-devel] [PULL 03/27] hw/block/pflash: Simplify trace_pflash_data_read/write() Philippe Mathieu-Daudé
2019-07-02  0:58 ` [Qemu-devel] [PULL 04/27] hw/block/pflash_cfi02: Fix debug format string Philippe Mathieu-Daudé
2019-07-02  0:58 ` [Qemu-devel] [PULL 05/27] hw/block/pflash_cfi02: Add an enum to define the write cycles Philippe Mathieu-Daudé
2019-07-02  0:58 ` [Qemu-devel] [PULL 06/27] hw/block/pflash_cfi02: Add helpers to manipulate the status bits Philippe Mathieu-Daudé
2019-07-02  0:58 ` [Qemu-devel] [PULL 07/27] hw/block/pflash_cfi02: Simplify a statement using fall through Philippe Mathieu-Daudé
2019-07-02  0:58 ` [Qemu-devel] [PULL 08/27] hw/block/pflash_cfi02: Use the ldst API in pflash_write() Philippe Mathieu-Daudé
2019-07-02  0:58 ` [Qemu-devel] [PULL 09/27] hw/block/pflash_cfi02: Use the ldst API in pflash_read() Philippe Mathieu-Daudé
2019-07-02  0:58 ` [Qemu-devel] [PULL 10/27] hw/block/pflash_cfi02: Extract the pflash_data_read() function Philippe Mathieu-Daudé
2019-07-02  0:58 ` [Qemu-devel] [PULL 11/27] hw/block/pflash_cfi02: Unify the MemoryRegionOps Philippe Mathieu-Daudé
2019-07-02  0:58 ` Philippe Mathieu-Daudé [this message]
2019-07-02  0:58 ` [Qemu-devel] [PULL 13/27] tests/pflash-cfi02: Refactor to support testing multiple configurations Philippe Mathieu-Daudé
2019-07-02  0:58 ` [Qemu-devel] [PULL 14/27] hw/block/pflash_cfi02: Remove pointless local variable Philippe Mathieu-Daudé
2019-07-02  0:59 ` [Qemu-devel] [PULL 15/27] hw/block/pflash_cfi02: Document the current CFI values Philippe Mathieu-Daudé
2019-07-02  0:59 ` [Qemu-devel] [PULL 16/27] hw/block/pflash_cfi02: Hold the PRI table offset in a variable Philippe Mathieu-Daudé
2019-07-02  0:59 ` [Qemu-devel] [PULL 17/27] hw/block/pflash_cfi02: Document 'Page Mode' operations are not supported Philippe Mathieu-Daudé
2019-07-02  0:59 ` [Qemu-devel] [PULL 18/27] hw/block/pflash_cfi02: Implement nonuniform sector sizes Philippe Mathieu-Daudé
2019-07-02  0:59 ` [Qemu-devel] [PULL 19/27] hw/block/pflash_cfi02: Extract pflash_regions_count() Philippe Mathieu-Daudé
2019-07-02  0:59 ` [Qemu-devel] [PULL 20/27] hw/block/pflash_cfi02: Split if() condition Philippe Mathieu-Daudé
2019-07-02  0:59 ` [Qemu-devel] [PULL 21/27] hw/block/pflash_cfi02: Fix CFI in autoselect mode Philippe Mathieu-Daudé
2019-07-02  0:59 ` [Qemu-devel] [PULL 22/27] hw/block/pflash_cfi02: Fix reset command not ignored during erase Philippe Mathieu-Daudé
2019-07-02  0:59 ` [Qemu-devel] [PULL 23/27] hw/block/pflash_cfi02: Implement multi-sector erase Philippe Mathieu-Daudé
2019-07-02  0:59 ` [Qemu-devel] [PULL 24/27] hw/block/pflash_cfi02: Implement erase suspend/resume Philippe Mathieu-Daudé
2019-07-11 12:35   ` Peter Maydell
2019-07-11 12:51     ` Philippe Mathieu-Daudé
2019-07-02  0:59 ` [Qemu-devel] [PULL 25/27] hw/block/pflash_cfi02: Use chip erase time specified in the CFI table Philippe Mathieu-Daudé
2019-07-02  0:59 ` [Qemu-devel] [PULL 26/27] hw/block/pflash_cfi02: Document commands Philippe Mathieu-Daudé
2019-07-02  0:59 ` [Qemu-devel] [PULL 27/27] hw/block/pflash_cfi02: Reduce I/O accesses to 16-bit Philippe Mathieu-Daudé
2019-07-03 15:52   ` Stephen Checkoway
2019-07-03 16:02     ` Philippe Mathieu-Daudé
2019-07-03 16:20       ` Stephen Checkoway
2019-07-03 16:36         ` Philippe Mathieu-Daudé
2019-07-04 12:45           ` Philippe Mathieu-Daudé
2019-07-08 17:00             ` Stephen Checkoway
2019-07-02 17:56 ` [Qemu-devel] [PULL 00/27] pflash-next patches Peter Maydell

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