From: Eduardo Habkost <ehabkost@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>,
Paolo Bonzini <pbonzini@redhat.com>,
qemu-devel@nongnu.org,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Richard Henderson <rth@twiddle.net>
Cc: Paul Lai <paul.c.lai@intel.com>
Subject: [Qemu-devel] [PULL v3 31/42] i386: Introduce SnowRidge CPU model
Date: Tue, 2 Jul 2019 12:35:24 -0300 [thread overview]
Message-ID: <20190702153535.9851-32-ehabkost@redhat.com> (raw)
In-Reply-To: <20190702153535.9851-1-ehabkost@redhat.com>
From: Paul Lai <paul.c.lai@intel.com>
SnowRidge CPU supports Accelerator Infrastrcture Architecture (MOVDIRI,
MOVDIR64B), CLDEMOTE and SPLIT_LOCK_DISABLE.
MOVDIRI, MOVDIR64B, and CLDEMOTE are found via CPUID.
The availability of SPLIT_LOCK_DISABLE is check via msr access
References can be found in either:
https://software.intel.com/en-us/articles/intel-sdm
https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-and-future-features-programming-reference
Signed-off-by: Paul Lai <paul.c.lai@intel.com>
Tested-by: Tao3 Xu <tao3.xu@intel.com>
Message-Id: <20190626162129.25345-1-paul.c.lai@intel.com>
[ehabkost: squashed SPLIT_LOCK_DETECT patch]
Message-Id: <20190626163232.25711-1-paul.c.lai@intel.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
target/i386/cpu.c | 71 +++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 71 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index ea52db0600..6c04a258ed 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -2688,6 +2688,77 @@ static X86CPUDefinition builtin_x86_defs[] = {
.xlevel = 0x80000008,
.model_id = "Intel Xeon Processor (Icelake)",
},
+ {
+ .name = "SnowRidge-Server",
+ .level = 27,
+ .vendor = CPUID_VENDOR_INTEL,
+ .family = 6,
+ .model = 134,
+ .stepping = 1,
+ .features[FEAT_1_EDX] =
+ /* missing: CPUID_PN CPUID_IA64 */
+ /* missing: CPUID_DTS, CPUID_HT, CPUID_TM, CPUID_PBE */
+ CPUID_FP87 | CPUID_VME | CPUID_DE | CPUID_PSE |
+ CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE |
+ CPUID_CX8 | CPUID_APIC | CPUID_SEP |
+ CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV |
+ CPUID_PAT | CPUID_PSE36 | CPUID_CLFLUSH |
+ CPUID_MMX |
+ CPUID_FXSR | CPUID_SSE | CPUID_SSE2,
+ .features[FEAT_1_ECX] =
+ CPUID_EXT_SSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_MONITOR |
+ CPUID_EXT_VMX |
+ CPUID_EXT_SSSE3 |
+ CPUID_EXT_CX16 |
+ CPUID_EXT_SSE41 |
+ CPUID_EXT_SSE42 | CPUID_EXT_X2APIC | CPUID_EXT_MOVBE |
+ CPUID_EXT_POPCNT |
+ CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_AES | CPUID_EXT_XSAVE |
+ CPUID_EXT_RDRAND,
+ .features[FEAT_8000_0001_EDX] =
+ CPUID_EXT2_SYSCALL |
+ CPUID_EXT2_NX |
+ CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP |
+ CPUID_EXT2_LM,
+ .features[FEAT_8000_0001_ECX] =
+ CPUID_EXT3_LAHF_LM |
+ CPUID_EXT3_3DNOWPREFETCH,
+ .features[FEAT_7_0_EBX] =
+ CPUID_7_0_EBX_FSGSBASE |
+ CPUID_7_0_EBX_SMEP |
+ CPUID_7_0_EBX_ERMS |
+ CPUID_7_0_EBX_MPX | /* missing bits 13, 15 */
+ CPUID_7_0_EBX_RDSEED |
+ CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLFLUSHOPT |
+ CPUID_7_0_EBX_CLWB |
+ CPUID_7_0_EBX_SHA_NI,
+ .features[FEAT_7_0_ECX] =
+ CPUID_7_0_ECX_UMIP |
+ /* missing bit 5 */
+ CPUID_7_0_ECX_GFNI |
+ CPUID_7_0_ECX_MOVDIRI | CPUID_7_0_ECX_CLDEMOTE |
+ CPUID_7_0_ECX_MOVDIR64B,
+ .features[FEAT_7_0_EDX] =
+ CPUID_7_0_EDX_SPEC_CTRL |
+ CPUID_7_0_EDX_ARCH_CAPABILITIES | CPUID_7_0_EDX_SPEC_CTRL_SSBD |
+ CPUID_7_0_EDX_CORE_CAPABILITY,
+ .features[FEAT_CORE_CAPABILITY] =
+ MSR_CORE_CAP_SPLIT_LOCK_DETECT,
+ /*
+ * Missing: XSAVES (not supported by some Linux versions,
+ * including v4.1 to v4.12).
+ * KVM doesn't yet expose any XSAVES state save component,
+ * and the only one defined in Skylake (processor tracing)
+ * probably will block migration anyway.
+ */
+ .features[FEAT_XSAVE] =
+ CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC |
+ CPUID_XSAVE_XGETBV1,
+ .features[FEAT_6_EAX] =
+ CPUID_6_EAX_ARAT,
+ .xlevel = 0x80000008,
+ .model_id = "Intel Atom Processor (SnowRidge)",
+ },
{
.name = "KnightsMill",
.level = 0xd,
--
2.18.0.rc1.1.g3f1ff2140
next prev parent reply other threads:[~2019-07-02 16:51 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-02 15:34 [Qemu-devel] [PULL v3 00/42] Machine and x86 queue, 2019-07-02 Eduardo Habkost
2019-07-02 15:34 ` [Qemu-devel] [PULL v3 01/42] hw/boards: Add struct CpuTopology to MachineState Eduardo Habkost
2019-07-02 15:34 ` [Qemu-devel] [PULL v3 02/42] machine: Refactor smp-related call chains to pass MachineState Eduardo Habkost
2019-07-02 15:34 ` [Qemu-devel] [PULL v3 03/42] general: Replace global smp variables with smp machine properties Eduardo Habkost
2019-07-02 15:34 ` [Qemu-devel] [PULL v3 04/42] hw/ppc: Replace global smp variables with machine smp properties Eduardo Habkost
2019-07-02 15:34 ` [Qemu-devel] [PULL v3 05/42] hw/riscv: " Eduardo Habkost
2019-07-02 15:34 ` [Qemu-devel] [PULL v3 06/42] hw/s390x: " Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 07/42] hw/i386: " Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 08/42] hw/arm: " Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 09/42] hw: Replace global smp variables with MachineState for all remaining archs Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 10/42] vl.c: Replace smp global variables with smp machine properties Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 11/42] i386: Add die-level cpu topology to x86CPU on PCMachine Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 12/42] hw/i386: Adjust nr_dies with configured smp_dies for PCMachine Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 13/42] i386/cpu: Consolidate die-id validity in smp context Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 14/42] i386: Update new x86_apicid parsing rules with die_offset support Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 15/42] pc: fix possible NULL pointer dereference in pc_machine_get_device_memory_region_size() Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 16/42] machine: show if CLI option '-numa node, mem' is supported in QAPI schema Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 17/42] numa: deprecate 'mem' parameter of '-numa node' option Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 18/42] numa: deprecate implict memory distribution between nodes Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 19/42] hppa: Delete unused hppa_cpu_list() function Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 20/42] target/i386: fix feature check in hyperv-stub.c Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 21/42] deprecate -mem-path fallback to anonymous RAM Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 22/42] i386: Don't print warning if phys-bits was set automatically Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 23/42] i386: Fix signedness of hyperv_spinlock_attempts Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 24/42] i386: make 'hv-spinlocks' a regular uint32 property Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 25/42] x86/cpu: use FeatureWordArray to define filtered_features Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 26/42] i386: Remove unused host_cpudef variable Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 27/42] target/i386: Add CPUID.1F generation support for multi-dies PCMachine Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 28/42] machine: Refactor smp_parse() in vl.c as MachineClass::smp_parse() Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 29/42] vl.c: Add -smp, dies=* command line support and update doc Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 30/42] qmp: Add deprecation information to query-machines Eduardo Habkost
2019-07-02 15:35 ` Eduardo Habkost [this message]
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 32/42] qmp: Add "alias-of" field to query-cpu-definitions Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 33/42] i386: Add x-force-features option for testing Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 34/42] i386: Get model-id from CPU object on "-cpu help" Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 35/42] i386: Register versioned CPU models Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 36/42] i386: Define -IBRS, -noTSX, -IBRS versions of " Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 37/42] i386: Replace -noTSX, -IBRS, -IBPB CPU models with aliases Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 38/42] i386: Make unversioned CPU models be aliases Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 39/42] docs: Deprecate CPU model runnability guarantees Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 40/42] i386: Add Cascadelake-Server-v2 CPU model Eduardo Habkost
2019-07-03 1:16 ` Xiaoyao Li
2019-07-03 18:06 ` Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 41/42] numa: allow memory-less nodes when using memdev as backend Eduardo Habkost
2019-07-02 15:35 ` [Qemu-devel] [PULL v3 42/42] tests: use -numa memdev option in tests instead of legacy 'mem' option Eduardo Habkost
2019-07-02 22:51 ` [Qemu-devel] [PULL v3 00/42] Machine and x86 queue, 2019-07-02 no-reply
2019-07-02 23:19 ` no-reply
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