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From: David Gibson <david@gibson.dropbear.id.au>
To: Greg Kurz <groug@kaod.org>
Cc: qemu-ppc@nongnu.org, "Cédric Le Goater" <clg@kaod.org>,
	qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH for-4.1] xics/kvm: Always set the MASKED bit if interrupt is masked
Date: Thu, 4 Jul 2019 10:22:58 +1000	[thread overview]
Message-ID: <20190704002258.GQ9442@umbus.fritz.box> (raw)
In-Reply-To: <156217454083.559957.7359208229523652842.stgit@bahia.lan>

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On Wed, Jul 03, 2019 at 07:22:20PM +0200, Greg Kurz wrote:
> The ics_set_kvm_state_one() function is called either to restore the
> state of an interrupt source during migration or to set the interrupt
> source to a default state during reset.
> 
> Since always, ie. 2013, the code only sets the MASKED bit if the 'current
> priority' and the 'saved priority' are different. This is likely true
> when restoring an interrupt that had been previously masked with the
> ibm,int-off RTAS call. However this is always false in the case of
> reset since both 'current priority' and 'saved priority' are equal to
> 0xff, and the MASKED bit is never set.
> 
> The legacy KVM XICS device gets away with that because it ends updating
> its internal structure the same way, whether the MASKED bit is set or
> the priority is 0xff.
> 
> The XICS-on-XIVE device for POWER9 is different. It sticks to the KVM
> documentation [1] and _really_ relies on the MASKED bit to correctly
> set. If not, it will configure the interrupt source in the XIVE HW, even
> though the guest hasn't configured the interrupt yet. This disturbs the
> complex logic implemented in XICS-on-XIVE and may result in the loss of
> subsequent queued events.
> 
> Always set the MASKED bit if interrupt is masked as expected by the KVM
> XICS-on-XIVE device. This has no impact on the legacy KVM XICS.
> 
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/virtual/kvm/devices/xics.txt
> 
> Signed-off-by: Greg Kurz <groug@kaod.org>

Applied to ppc-for-4.1, thanks.

> ---
>  hw/intc/xics_kvm.c |    3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
> index 51433b19b076..2df1f3e92c7e 100644
> --- a/hw/intc/xics_kvm.c
> +++ b/hw/intc/xics_kvm.c
> @@ -257,6 +257,9 @@ int ics_set_kvm_state_one(ICSState *ics, int srcno, Error **errp)
>          << KVM_XICS_PRIORITY_SHIFT;
>      if (irq->priority != irq->saved_priority) {
>          assert(irq->priority == 0xff);
> +    }
> +
> +    if (irq->priority == 0xff) {
>          state |= KVM_XICS_MASKED;
>      }
>  
> 

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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      parent reply	other threads:[~2019-07-04  0:49 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-03 17:22 [Qemu-devel] [PATCH for-4.1] xics/kvm: Always set the MASKED bit if interrupt is masked Greg Kurz
2019-07-03 22:58 ` no-reply
2019-07-04  0:22 ` David Gibson [this message]

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