* [Qemu-devel] [PULL 1/4] ati-vga: Improve readability of ati_2d_blt function
2019-07-05 13:42 [Qemu-devel] [PULL 0/4] Vga 20190705 patches Gerd Hoffmann
@ 2019-07-05 13:42 ` Gerd Hoffmann
2019-07-05 13:42 ` [Qemu-devel] [PULL 2/4] ati-vga: Fix frame buffer endianness for big endian target Gerd Hoffmann
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Gerd Hoffmann @ 2019-07-05 13:42 UTC (permalink / raw)
To: qemu-devel; +Cc: Gerd Hoffmann
From: BALATON Zoltan <balaton@eik.bme.hu>
Move common parts before the switch to remove code duplication and
improve readibility.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-id: 04b67ff483223d4722b0b044192558e7d17b36b5.1562151410.git.balaton@eik.bme.hu
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
hw/display/ati_2d.c | 80 +++++++++++++++++++--------------------------
1 file changed, 33 insertions(+), 47 deletions(-)
diff --git a/hw/display/ati_2d.c b/hw/display/ati_2d.c
index 2dbf53f03936..c31142af6e19 100644
--- a/hw/display/ati_2d.c
+++ b/hw/display/ati_2d.c
@@ -42,6 +42,8 @@ static int ati_bpp_from_datatype(ATIVGAState *s)
}
}
+#define DEFAULT_CNTL (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CNTL)
+
void ati_2d_blt(ATIVGAState *s)
{
/* FIXME it is probably more complex than this and may need to be */
@@ -51,6 +53,22 @@ void ati_2d_blt(ATIVGAState *s)
s->vga.vbe_start_addr, surface_data(ds), surface_stride(ds),
surface_bits_per_pixel(ds),
(s->regs.dp_mix & GMC_ROP3_MASK) >> 16);
+ int bpp = ati_bpp_from_datatype(s);
+ int dst_stride = DEFAULT_CNTL ? s->regs.dst_pitch : s->regs.default_pitch;
+ uint8_t *dst_bits = s->vga.vram_ptr + (DEFAULT_CNTL ?
+ s->regs.dst_offset : s->regs.default_offset);
+
+ if (s->dev_id == PCI_DEVICE_ID_ATI_RAGE128_PF) {
+ dst_bits += s->regs.crtc_offset & 0x07ffffff;
+ dst_stride *= bpp;
+ }
+ uint8_t *end = s->vga.vram_ptr + s->vga.vram_size;
+ if (dst_bits >= end ||
+ dst_bits + s->regs.dst_x + (s->regs.dst_y + s->regs.dst_height) *
+ dst_stride >= end) {
+ qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n");
+ return;
+ }
DPRINTF("%d %d %d, %d %d %d, (%d,%d) -> (%d,%d) %dx%d\n",
s->regs.src_offset, s->regs.dst_offset, s->regs.default_offset,
s->regs.src_pitch, s->regs.dst_pitch, s->regs.default_pitch,
@@ -59,41 +77,28 @@ void ati_2d_blt(ATIVGAState *s)
switch (s->regs.dp_mix & GMC_ROP3_MASK) {
case ROP3_SRCCOPY:
{
- uint8_t *src_bits, *dst_bits, *end;
- int src_stride, dst_stride, bpp = ati_bpp_from_datatype(s);
- src_bits = s->vga.vram_ptr +
- (s->regs.dp_gui_master_cntl & GMC_SRC_PITCH_OFFSET_CNTL ?
- s->regs.src_offset : s->regs.default_offset);
- dst_bits = s->vga.vram_ptr +
- (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CNTL ?
- s->regs.dst_offset : s->regs.default_offset);
- src_stride = (s->regs.dp_gui_master_cntl & GMC_SRC_PITCH_OFFSET_CNTL ?
- s->regs.src_pitch : s->regs.default_pitch);
- dst_stride = (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CNTL ?
- s->regs.dst_pitch : s->regs.default_pitch);
+ int src_stride = DEFAULT_CNTL ?
+ s->regs.src_pitch : s->regs.default_pitch;
+ uint8_t *src_bits = s->vga.vram_ptr + (DEFAULT_CNTL ?
+ s->regs.src_offset : s->regs.default_offset);
if (s->dev_id == PCI_DEVICE_ID_ATI_RAGE128_PF) {
src_bits += s->regs.crtc_offset & 0x07ffffff;
- dst_bits += s->regs.crtc_offset & 0x07ffffff;
src_stride *= bpp;
- dst_stride *= bpp;
}
+ if (src_bits >= end ||
+ src_bits + s->regs.src_x + (s->regs.src_y + s->regs.dst_height) *
+ src_stride >= end) {
+ qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n");
+ return;
+ }
+
src_stride /= sizeof(uint32_t);
dst_stride /= sizeof(uint32_t);
-
DPRINTF("pixman_blt(%p, %p, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d)\n",
src_bits, dst_bits, src_stride, dst_stride, bpp, bpp,
s->regs.src_x, s->regs.src_y, s->regs.dst_x, s->regs.dst_y,
s->regs.dst_width, s->regs.dst_height);
- end = s->vga.vram_ptr + s->vga.vram_size;
- if (src_bits >= end || dst_bits >= end ||
- src_bits + s->regs.src_x + (s->regs.src_y + s->regs.dst_height) *
- src_stride * sizeof(uint32_t) >= end ||
- dst_bits + s->regs.dst_x + (s->regs.dst_y + s->regs.dst_height) *
- dst_stride * sizeof(uint32_t) >= end) {
- qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n");
- return;
- }
pixman_blt((uint32_t *)src_bits, (uint32_t *)dst_bits,
src_stride, dst_stride, bpp, bpp,
s->regs.src_x, s->regs.src_y,
@@ -115,20 +120,7 @@ void ati_2d_blt(ATIVGAState *s)
case ROP3_BLACKNESS:
case ROP3_WHITENESS:
{
- uint8_t *dst_bits, *end;
- int dst_stride, bpp = ati_bpp_from_datatype(s);
uint32_t filler = 0;
- dst_bits = s->vga.vram_ptr +
- (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CNTL ?
- s->regs.dst_offset : s->regs.default_offset);
- dst_stride = (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CNTL ?
- s->regs.dst_pitch : s->regs.default_pitch);
-
- if (s->dev_id == PCI_DEVICE_ID_ATI_RAGE128_PF) {
- dst_bits += s->regs.crtc_offset & 0x07ffffff;
- dst_stride *= bpp;
- }
- dst_stride /= sizeof(uint32_t);
switch (s->regs.dp_mix & GMC_ROP3_MASK) {
case ROP3_PATCOPY:
@@ -144,22 +136,16 @@ void ati_2d_blt(ATIVGAState *s)
break;
}
+ dst_stride /= sizeof(uint32_t);
DPRINTF("pixman_fill(%p, %d, %d, %d, %d, %d, %d, %x)\n",
dst_bits, dst_stride, bpp,
s->regs.dst_x, s->regs.dst_y,
s->regs.dst_width, s->regs.dst_height,
filler);
- end = s->vga.vram_ptr + s->vga.vram_size;
- if (dst_bits >= end ||
- dst_bits + s->regs.dst_x + (s->regs.dst_y + s->regs.dst_height) *
- dst_stride * sizeof(uint32_t) >= end) {
- qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n");
- return;
- }
pixman_fill((uint32_t *)dst_bits, dst_stride, bpp,
- s->regs.dst_x, s->regs.dst_y,
- s->regs.dst_width, s->regs.dst_height,
- filler);
+ s->regs.dst_x, s->regs.dst_y,
+ s->regs.dst_width, s->regs.dst_height,
+ filler);
if (dst_bits >= s->vga.vram_ptr + s->vga.vbe_start_addr &&
dst_bits < s->vga.vram_ptr + s->vga.vbe_start_addr +
s->vga.vbe_regs[VBE_DISPI_INDEX_YRES] * s->vga.vbe_line_offset) {
--
2.18.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [Qemu-devel] [PULL 2/4] ati-vga: Fix frame buffer endianness for big endian target
2019-07-05 13:42 [Qemu-devel] [PULL 0/4] Vga 20190705 patches Gerd Hoffmann
2019-07-05 13:42 ` [Qemu-devel] [PULL 1/4] ati-vga: Improve readability of ati_2d_blt function Gerd Hoffmann
@ 2019-07-05 13:42 ` Gerd Hoffmann
2019-07-05 13:42 ` [Qemu-devel] [PULL 3/4] ati-vga: Fix reverse bit blts Gerd Hoffmann
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Gerd Hoffmann @ 2019-07-05 13:42 UTC (permalink / raw)
To: qemu-devel; +Cc: Gerd Hoffmann
From: BALATON Zoltan <balaton@eik.bme.hu>
The extended mode frame buffer should be little endian even when
emulating big endian machine (such as PPC). This fixes color problems
with MorphOS.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-id: 439aa85061f103446df7b42632d730971a372432.1562151410.git.balaton@eik.bme.hu
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
hw/display/ati.c | 1 +
hw/display/ati_2d.c | 10 +++++-----
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/hw/display/ati.c b/hw/display/ati.c
index c1d9d1518f4a..590362ea568c 100644
--- a/hw/display/ati.c
+++ b/hw/display/ati.c
@@ -89,6 +89,7 @@ static void ati_vga_switch_mode(ATIVGAState *s)
DPRINTF("Switching to %dx%d %d %d @ %x\n", h, v, stride, bpp, offs);
vbe_ioport_write_index(&s->vga, 0, VBE_DISPI_INDEX_ENABLE);
vbe_ioport_write_data(&s->vga, 0, VBE_DISPI_DISABLED);
+ s->vga.big_endian_fb = false;
/* reset VBE regs then set up mode */
s->vga.vbe_regs[VBE_DISPI_INDEX_XRES] = h;
s->vga.vbe_regs[VBE_DISPI_INDEX_YRES] = v;
diff --git a/hw/display/ati_2d.c b/hw/display/ati_2d.c
index c31142af6e19..b09753320a9e 100644
--- a/hw/display/ati_2d.c
+++ b/hw/display/ati_2d.c
@@ -124,15 +124,15 @@ void ati_2d_blt(ATIVGAState *s)
switch (s->regs.dp_mix & GMC_ROP3_MASK) {
case ROP3_PATCOPY:
- filler = bswap32(s->regs.dp_brush_frgd_clr);
+ filler = s->regs.dp_brush_frgd_clr;
break;
case ROP3_BLACKNESS:
- filler = rgb_to_pixel32(s->vga.palette[0], s->vga.palette[1],
- s->vga.palette[2]) << 8 | 0xff;
+ filler = 0xffUL << 24 | rgb_to_pixel32(s->vga.palette[0],
+ s->vga.palette[1], s->vga.palette[2]);
break;
case ROP3_WHITENESS:
- filler = rgb_to_pixel32(s->vga.palette[3], s->vga.palette[4],
- s->vga.palette[5]) << 8 | 0xff;
+ filler = 0xffUL << 24 | rgb_to_pixel32(s->vga.palette[3],
+ s->vga.palette[4], s->vga.palette[5]);
break;
}
--
2.18.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [Qemu-devel] [PULL 3/4] ati-vga: Fix reverse bit blts
2019-07-05 13:42 [Qemu-devel] [PULL 0/4] Vga 20190705 patches Gerd Hoffmann
2019-07-05 13:42 ` [Qemu-devel] [PULL 1/4] ati-vga: Improve readability of ati_2d_blt function Gerd Hoffmann
2019-07-05 13:42 ` [Qemu-devel] [PULL 2/4] ati-vga: Fix frame buffer endianness for big endian target Gerd Hoffmann
@ 2019-07-05 13:42 ` Gerd Hoffmann
2019-07-05 13:42 ` [Qemu-devel] [PULL 4/4] ati-vga: Fix setting offset together with pitch for r128pro Gerd Hoffmann
2019-07-05 15:04 ` [Qemu-devel] [PULL 0/4] Vga 20190705 patches Peter Maydell
4 siblings, 0 replies; 6+ messages in thread
From: Gerd Hoffmann @ 2019-07-05 13:42 UTC (permalink / raw)
To: qemu-devel; +Cc: Gerd Hoffmann
From: BALATON Zoltan <balaton@eik.bme.hu>
The pixman library only supports blts with left to right, top to
bottom order but the ATI VGA engine can also do different directions.
Fix support for these via a temporary buffer for now. This fixes
rendering issues related to such blts (such as moving windows) but
some other glitches still remain.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-id: e21855faaeb30d7b1771f084f283f6a30bedb1a3.1562227303.git.balaton@eik.bme.hu
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
hw/display/ati_2d.c | 55 ++++++++++++++++++++++++++++++++-------------
1 file changed, 40 insertions(+), 15 deletions(-)
diff --git a/hw/display/ati_2d.c b/hw/display/ati_2d.c
index b09753320a9e..42e82311eb44 100644
--- a/hw/display/ati_2d.c
+++ b/hw/display/ati_2d.c
@@ -53,6 +53,10 @@ void ati_2d_blt(ATIVGAState *s)
s->vga.vbe_start_addr, surface_data(ds), surface_stride(ds),
surface_bits_per_pixel(ds),
(s->regs.dp_mix & GMC_ROP3_MASK) >> 16);
+ int dst_x = (s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT ?
+ s->regs.dst_x : s->regs.dst_x + 1 - s->regs.dst_width);
+ int dst_y = (s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM ?
+ s->regs.dst_y : s->regs.dst_y + 1 - s->regs.dst_height);
int bpp = ati_bpp_from_datatype(s);
int dst_stride = DEFAULT_CNTL ? s->regs.dst_pitch : s->regs.default_pitch;
uint8_t *dst_bits = s->vga.vram_ptr + (DEFAULT_CNTL ?
@@ -63,20 +67,25 @@ void ati_2d_blt(ATIVGAState *s)
dst_stride *= bpp;
}
uint8_t *end = s->vga.vram_ptr + s->vga.vram_size;
- if (dst_bits >= end ||
- dst_bits + s->regs.dst_x + (s->regs.dst_y + s->regs.dst_height) *
+ if (dst_bits >= end || dst_bits + dst_x + (dst_y + s->regs.dst_height) *
dst_stride >= end) {
qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n");
return;
}
- DPRINTF("%d %d %d, %d %d %d, (%d,%d) -> (%d,%d) %dx%d\n",
+ DPRINTF("%d %d %d, %d %d %d, (%d,%d) -> (%d,%d) %dx%d %c %c\n",
s->regs.src_offset, s->regs.dst_offset, s->regs.default_offset,
s->regs.src_pitch, s->regs.dst_pitch, s->regs.default_pitch,
s->regs.src_x, s->regs.src_y, s->regs.dst_x, s->regs.dst_y,
- s->regs.dst_width, s->regs.dst_height);
+ s->regs.dst_width, s->regs.dst_height,
+ (s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT ? '>' : '<'),
+ (s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM ? 'v' : '^'));
switch (s->regs.dp_mix & GMC_ROP3_MASK) {
case ROP3_SRCCOPY:
{
+ int src_x = (s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT ?
+ s->regs.src_x : s->regs.src_x + 1 - s->regs.dst_width);
+ int src_y = (s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM ?
+ s->regs.src_y : s->regs.src_y + 1 - s->regs.dst_height);
int src_stride = DEFAULT_CNTL ?
s->regs.src_pitch : s->regs.default_pitch;
uint8_t *src_bits = s->vga.vram_ptr + (DEFAULT_CNTL ?
@@ -86,9 +95,8 @@ void ati_2d_blt(ATIVGAState *s)
src_bits += s->regs.crtc_offset & 0x07ffffff;
src_stride *= bpp;
}
- if (src_bits >= end ||
- src_bits + s->regs.src_x + (s->regs.src_y + s->regs.dst_height) *
- src_stride >= end) {
+ if (src_bits >= end || src_bits + src_x +
+ (src_y + s->regs.dst_height) * src_stride >= end) {
qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n");
return;
}
@@ -97,19 +105,36 @@ void ati_2d_blt(ATIVGAState *s)
dst_stride /= sizeof(uint32_t);
DPRINTF("pixman_blt(%p, %p, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d)\n",
src_bits, dst_bits, src_stride, dst_stride, bpp, bpp,
- s->regs.src_x, s->regs.src_y, s->regs.dst_x, s->regs.dst_y,
+ src_x, src_y, dst_x, dst_y,
s->regs.dst_width, s->regs.dst_height);
- pixman_blt((uint32_t *)src_bits, (uint32_t *)dst_bits,
- src_stride, dst_stride, bpp, bpp,
- s->regs.src_x, s->regs.src_y,
- s->regs.dst_x, s->regs.dst_y,
- s->regs.dst_width, s->regs.dst_height);
+ if (s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT &&
+ s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM) {
+ pixman_blt((uint32_t *)src_bits, (uint32_t *)dst_bits,
+ src_stride, dst_stride, bpp, bpp,
+ src_x, src_y, dst_x, dst_y,
+ s->regs.dst_width, s->regs.dst_height);
+ } else {
+ /* FIXME: We only really need a temporary if src and dst overlap */
+ int llb = s->regs.dst_width * (bpp / 8);
+ int tmp_stride = DIV_ROUND_UP(llb, sizeof(uint32_t));
+ uint32_t *tmp = g_malloc(tmp_stride * sizeof(uint32_t) *
+ s->regs.dst_height);
+ pixman_blt((uint32_t *)src_bits, tmp,
+ src_stride, tmp_stride, bpp, bpp,
+ src_x, src_y, 0, 0,
+ s->regs.dst_width, s->regs.dst_height);
+ pixman_blt(tmp, (uint32_t *)dst_bits,
+ tmp_stride, dst_stride, bpp, bpp,
+ 0, 0, dst_x, dst_y,
+ s->regs.dst_width, s->regs.dst_height);
+ g_free(tmp);
+ }
if (dst_bits >= s->vga.vram_ptr + s->vga.vbe_start_addr &&
dst_bits < s->vga.vram_ptr + s->vga.vbe_start_addr +
s->vga.vbe_regs[VBE_DISPI_INDEX_YRES] * s->vga.vbe_line_offset) {
memory_region_set_dirty(&s->vga.vram, s->vga.vbe_start_addr +
s->regs.dst_offset +
- s->regs.dst_y * surface_stride(ds),
+ dst_y * surface_stride(ds),
s->regs.dst_height * surface_stride(ds));
}
s->regs.dst_x += s->regs.dst_width;
@@ -151,7 +176,7 @@ void ati_2d_blt(ATIVGAState *s)
s->vga.vbe_regs[VBE_DISPI_INDEX_YRES] * s->vga.vbe_line_offset) {
memory_region_set_dirty(&s->vga.vram, s->vga.vbe_start_addr +
s->regs.dst_offset +
- s->regs.dst_y * surface_stride(ds),
+ dst_y * surface_stride(ds),
s->regs.dst_height * surface_stride(ds));
}
s->regs.dst_y += s->regs.dst_height;
--
2.18.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [Qemu-devel] [PULL 4/4] ati-vga: Fix setting offset together with pitch for r128pro
2019-07-05 13:42 [Qemu-devel] [PULL 0/4] Vga 20190705 patches Gerd Hoffmann
` (2 preceding siblings ...)
2019-07-05 13:42 ` [Qemu-devel] [PULL 3/4] ati-vga: Fix reverse bit blts Gerd Hoffmann
@ 2019-07-05 13:42 ` Gerd Hoffmann
2019-07-05 15:04 ` [Qemu-devel] [PULL 0/4] Vga 20190705 patches Peter Maydell
4 siblings, 0 replies; 6+ messages in thread
From: Gerd Hoffmann @ 2019-07-05 13:42 UTC (permalink / raw)
To: qemu-devel; +Cc: Gerd Hoffmann
From: BALATON Zoltan <balaton@eik.bme.hu>
Turns out my last fix to this broke one case for Rage 128 Pro so
revert that part of previous patch. This now fixes the remaining
rendering problems for MorphOS which now can produce picture with
-device ati-vga (although it may not be optimised yet and video
overlay emulation is still known to be missing).
Fixes: 866ad5f5ff620078f88183aa254f7b02727e6aa3
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-id: da33261a841755691f698db8190c868df0c0d3ae.1562276605.git.balaton@eik.bme.hu
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
hw/display/ati.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/display/ati.c b/hw/display/ati.c
index 590362ea568c..a747c4cc98c7 100644
--- a/hw/display/ati.c
+++ b/hw/display/ati.c
@@ -689,7 +689,7 @@ static void ati_mm_write(void *opaque, hwaddr addr,
break;
case SRC_PITCH_OFFSET:
if (s->dev_id == PCI_DEVICE_ID_ATI_RAGE128_PF) {
- s->regs.src_offset = (data & 0x1fffff) << 4;
+ s->regs.src_offset = (data & 0x1fffff) << 5;
s->regs.src_pitch = (data & 0x7fe00000) >> 21;
s->regs.src_tile = data >> 31;
} else {
@@ -700,7 +700,7 @@ static void ati_mm_write(void *opaque, hwaddr addr,
break;
case DST_PITCH_OFFSET:
if (s->dev_id == PCI_DEVICE_ID_ATI_RAGE128_PF) {
- s->regs.dst_offset = (data & 0x1fffff) << 4;
+ s->regs.dst_offset = (data & 0x1fffff) << 5;
s->regs.dst_pitch = (data & 0x7fe00000) >> 21;
s->regs.dst_tile = data >> 31;
} else {
--
2.18.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [Qemu-devel] [PULL 0/4] Vga 20190705 patches
2019-07-05 13:42 [Qemu-devel] [PULL 0/4] Vga 20190705 patches Gerd Hoffmann
` (3 preceding siblings ...)
2019-07-05 13:42 ` [Qemu-devel] [PULL 4/4] ati-vga: Fix setting offset together with pitch for r128pro Gerd Hoffmann
@ 2019-07-05 15:04 ` Peter Maydell
4 siblings, 0 replies; 6+ messages in thread
From: Peter Maydell @ 2019-07-05 15:04 UTC (permalink / raw)
To: Gerd Hoffmann; +Cc: QEMU Developers
On Fri, 5 Jul 2019 at 14:48, Gerd Hoffmann <kraxel@redhat.com> wrote:
>
> The following changes since commit 57dfc2c4d51e770ed3f617e5d1456d1e2bacf3f0:
>
> Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190704-1' into staging (2019-07-04 17:32:24 +0100)
>
> are available in the Git repository at:
>
> git://git.kraxel.org/qemu tags/vga-20190705-pull-request
>
> for you to fetch changes up to 146dd326c1ff5869ba9e243e30325c44d696c996:
>
> ati-vga: Fix setting offset together with pitch for r128pro (2019-07-05 09:50:33 +0200)
>
> ----------------------------------------------------------------
> vga: more ati bugfixes.
>
> ----------------------------------------------------------------
>
> BALATON Zoltan (4):
> ati-vga: Improve readability of ati_2d_blt function
> ati-vga: Fix frame buffer endianness for big endian target
> ati-vga: Fix reverse bit blts
> ati-vga: Fix setting offset together with pitch for r128pro
>
> hw/display/ati.c | 5 +-
> hw/display/ati_2d.c | 133 ++++++++++++++++++++++++--------------------
> 2 files changed, 75 insertions(+), 63 deletions(-)
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/4.1
for any user-visible changes.
-- PMM
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