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(localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 34FD51FF87; Thu, 11 Jul 2019 11:37:46 +0100 (BST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Date: Thu, 11 Jul 2019 11:37:37 +0100 Message-Id: <20190711103737.10017-1-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 Subject: [Qemu-devel] [PATCH v2 for 4.1] target/arm: report ARMv8-A FP support for AArch32 -cpu max X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , qemu-arm@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , 1836078@bugs.launchpad.net, Peter Maydell Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" When we converted to using feature bits in 602f6e42cfbf we missed out the fact (dp && arm_dc_feature(s, ARM_FEATURE_V8)) was supported for -cpu max configurations. This caused a regression in the GCC test suite. Fix this by setting the appropriate bits in mvfr1.FPHP to report ARMv8-A with FP support (but not ARMv8.2-FP16). Fixes: https://bugs.launchpad.net/qemu/+bug/1836078 Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- target/arm/cpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index e75a64a25a..ad164a773b 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2452,6 +2452,10 @@ static void arm_max_initfn(Object *obj) t = FIELD_DP32(t, ID_ISAR6, SPECRES, 1); cpu->isar.id_isar6 = t; + t = cpu->isar.mvfr1; + t = FIELD_DP32(t, MVFR1, FPHP, 2); /* v8.0 FP support */ + cpu->isar.mvfr1 = t; + t = cpu->isar.mvfr2; t = FIELD_DP32(t, MVFR2, SIMDMISC, 3); /* SIMD MaxNum */ t = FIELD_DP32(t, MVFR2, FPMISC, 4); /* FP MaxNum */ -- 2.20.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE7E5C74A51 for ; Thu, 11 Jul 2019 10:58:17 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AA6E0208E4 for ; Thu, 11 Jul 2019 10:58:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AA6E0208E4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:40426 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hlWmG-00084F-UG for qemu-devel@archiver.kernel.org; Thu, 11 Jul 2019 06:58:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45663) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hlWex-0004Ys-PH for qemu-devel@nongnu.org; Thu, 11 Jul 2019 06:50:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hlWew-0004J7-I1 for qemu-devel@nongnu.org; Thu, 11 Jul 2019 06:50:43 -0400 Received: from indium.canonical.com ([91.189.90.7]:44380) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hlWew-0004I9-CG for qemu-devel@nongnu.org; Thu, 11 Jul 2019 06:50:42 -0400 Received: from loganberry.canonical.com ([91.189.90.37]) by indium.canonical.com with esmtp (Exim 4.86_2 #2 (Debian)) id 1hlWev-0005M1-FN for ; Thu, 11 Jul 2019 10:50:41 +0000 Received: from loganberry.canonical.com (localhost [127.0.0.1]) by loganberry.canonical.com (Postfix) with ESMTP id 726342E8079 for ; Thu, 11 Jul 2019 10:50:41 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Date: Thu, 11 Jul 2019 10:37:37 -0000 From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org X-Launchpad-Notification-Type: bug X-Launchpad-Bug: product=qemu; status=In Progress; importance=Undecided; assignee=alex.bennee@linaro.org; X-Launchpad-Bug-Tags: arm testcase X-Launchpad-Bug-Information-Type: Public X-Launchpad-Bug-Private: no X-Launchpad-Bug-Security-Vulnerability: no X-Launchpad-Bug-Commenters: ajbennee christophe-lyon X-Launchpad-Bug-Reporter: Christophe Lyon (christophe-lyon) X-Launchpad-Bug-Modifier: =?utf-8?q?Alex_Benn=C3=A9e_=28ajbennee=29?= References: <156277131341.2267.3199507288563083183.malonedeb@wampee.canonical.com> Message-Id: <20190711103737.10017-1-alex.bennee@linaro.org> X-Launchpad-Message-Rationale: Subscriber (QEMU) @qemu-devel-ml X-Launchpad-Message-For: qemu-devel-ml Precedence: bulk X-Generated-By: Launchpad (canonical.com); Revision="19007"; Instance="launchpad-lazr.conf" X-Launchpad-Hash: 2a5973cc8f148af29b219c594ab2d062508b97b9 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 91.189.90.7 Subject: [Qemu-devel] [Bug 1836078] [PATCH v2 for 4.1] target/arm: report ARMv8-A FP support for AArch32 -cpu max X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Bug 1836078 <1836078@bugs.launchpad.net> Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Message-ID: <20190711103737.Mt8PIYnY08TZMH3xycH3EKVJHvlJ_mvps8vHv0yIFHk@z> When we converted to using feature bits in 602f6e42cfbf we missed out the fact (dp && arm_dc_feature(s, ARM_FEATURE_V8)) was supported for -cpu max configurations. This caused a regression in the GCC test suite. Fix this by setting the appropriate bits in mvfr1.FPHP to report ARMv8-A with FP support (but not ARMv8.2-FP16). Fixes: https://bugs.launchpad.net/qemu/+bug/1836078 Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- target/arm/cpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index e75a64a25a..ad164a773b 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2452,6 +2452,10 @@ static void arm_max_initfn(Object *obj) t =3D FIELD_DP32(t, ID_ISAR6, SPECRES, 1); cpu->isar.id_isar6 =3D t; = + t =3D cpu->isar.mvfr1; + t =3D FIELD_DP32(t, MVFR1, FPHP, 2); /* v8.0 FP support */ + cpu->isar.mvfr1 =3D t; + t =3D cpu->isar.mvfr2; t =3D FIELD_DP32(t, MVFR2, SIMDMISC, 3); /* SIMD MaxNum */ t =3D FIELD_DP32(t, MVFR2, FPMISC, 4); /* FP MaxNum */ -- = 2.20.1 -- = You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1836078 Title: Regressions on arm-linux-gnueabihf target with some GCC tests Status in QEMU: In Progress Bug description: Hi, After trying qemu master: commit 474f3938d79ab36b9231c9ad3b5a9314c2aeacde Merge: 68d7ff0 14f5d87 Author: Peter Maydell