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[97.126.117.207]) by smtp.gmail.com with ESMTPSA id i6sm32724751pgi.40.2019.07.19.14.03.27 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Fri, 19 Jul 2019 14:03:27 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 19 Jul 2019 14:03:02 -0700 Message-Id: <20190719210326.15466-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::544 Subject: [Qemu-devel] [PATCH for-4.2 00/24] target/arm: Implement ARMv8.1-VHE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, beata.michalska@linaro.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" About half of this patch set is cleanup of the qemu tlb handling leading up to the actual implementation of VHE, and the biggest piece of that: The EL2&0 translation regime. Testing so far has been limited to booting a debian 9 system with a 4.9 kernel, and a fedora 30 system with a 5.1 kernel. Both have KVM enabled, and both report enabling VHE is successful. r~ Richard Henderson (24): cputlb: Add tlb_set_asid_for_mmuidx cputlb: Add tlb_flush_asid_by_mmuidx and friends target/arm: Install ASIDs for long-form from EL1 target/arm: Install ASIDs for short-form from EL1 target/arm: Install ASIDs for EL2 target/arm: Define isar_feature_aa64_vh target/arm: Enable HCR_E2H for VHE target/arm: Add CONTEXTIDR_EL2 target/arm: Add TTBR1_EL2 target/arm: Update CNTVCT_EL0 for VHE target/arm: Add the hypervisor virtual counter target/arm: Add VHE system register redirection and aliasing target/arm: Split out vae1_tlbmask, vmalle1_tlbmask target/arm: Simplify tlb_force_broadcast alternatives target/arm: Reorganize ARMMMUIdx target/arm: Add regime_has_2_ranges target/arm: Update arm_mmu_idx for VHE target/arm: Update arm_sctlr for VHE target/arm: Install asids for E2&0 translation regime target/arm: Flush tlbs for E2&0 translation regime target/arm: Update arm_phys_excp_target_el for TGE target/arm: Update regime_is_user for EL2&0 target/arm: Update {fp,sve}_exception_el for VHE target/arm: Enable ARMv8.1-VHE in -cpu max include/exec/cpu-all.h | 11 + include/exec/cpu-defs.h | 2 + include/exec/exec-all.h | 35 ++ include/qom/cpu.h | 1 + target/arm/cpu-qom.h | 1 + target/arm/cpu.h | 259 +++++----- target/arm/internals.h | 62 ++- target/arm/translate.h | 2 +- accel/tcg/cputlb.c | 77 +++ target/arm/arch_dump.c | 2 +- target/arm/cpu.c | 2 + target/arm/cpu64.c | 1 + target/arm/debug_helper.c | 50 +- target/arm/helper-a64.c | 2 +- target/arm/helper.c | 985 ++++++++++++++++++++++++++----------- target/arm/m_helper.c | 6 +- target/arm/pauth_helper.c | 9 +- target/arm/translate-a64.c | 14 +- target/arm/translate.c | 17 +- 19 files changed, 1058 insertions(+), 480 deletions(-) -- 2.17.1