Re: [Qemu-devel] [PATCH v2 00/17] ppc/pnv: add XIVE support for KVM guests

[David Gibson <david@gibson.dropbear.id.au>]

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On Thu, Jul 18, 2019 at 01:54:03PM +0200, Cédric Le Goater wrote:
> Hello,
> 
> The QEMU PowerNV machine emulates a baremetal OpenPOWER system and
> acts as an hypervisor (L0). Supporting emulation of KVM to run guests
> (L1) requires a few more extensions, among which guest support for the
> XIVE interrupt controller on POWER9 processor.
> 
> The following changes include some fixes for the PowerNV machine and
> provide support for XIVE escalations and interrupt resend. This
> mechanism is used by XIVE to notify the hypervisor that a vCPU is not
> dispatched on a HW thread. Tested on a QEMU PowerNV machine and a
> simple QEMU pseries guest doing network on a local bridge.
> 
> The XIVE interrupt controller offers a way to increase the XIVE
> resources per chip by configuring multiple XIVE blocks on a chip. This
> is not currently supported by the model. However, some configurations,
> such as OPAL/skiboot, use one block-per-chip configuration with some
> optimizations. One of them is to override the hardwired chip ID by the
> block id in the PowerBUS operations and for CAM compares. This
> patchset improves the support for this setup. Tested with 4 chips.
> 
> A series from Suraj adding guest support in the Radix MMU model of the
> QEMU PowerNV machine is still required and will be send later. The
> whole patchset can be found under :
> 
>   https://github.com/legoater/qemu/tree/powernv-4.1

I've applied 1-8 to ppc-for-4.2, still looking at the rest.

> 
> Thanks,
> 
> C.
> 
> Changes since v1:
> 
>  - minor extra fixes 
>  - split the escalation support in different patches
>  - kept the XiveRouter type for XiveTCTX back pointer (will address
>    this in P10)
>  - removed pnv_xive_vst_size(). Really broken on indirect tables.
>  - improved the dump of the NVT table
>  - introduce pnv_xive_get_block_id()
> 
> 
> Cédric Le Goater (17):
>   ppc/xive: use an abstract type for XiveNotifier
>   ppc/pnv: add more dummy XSCOM addresses for the P9 CAPP
>   ppc/xive: Implement TM_PULL_OS_CTX special command
>   ppc/xive: Provide backlog support
>   ppc/xive: Provide escalation support
>   ppc/xive: Provide unconditional escalation support
>   ppc/xive: Provide silent escalation support
>   ppc/xive: Improve 'info pic' support
>   ppc/xive: Extend XiveTCTX with a XiveRouter pointer
>   ppc/xive: Introduce xive_tctx_ipb_update()
>   ppc/xive: Synthesize interrupt from the saved IPB in the NVT
>   ppc/pnv: Remove pnv_xive_vst_size() routine
>   ppc/pnv: Dump the XIVE NVT table
>   ppc/pnv: Skip empty slots of the XIVE NVT table
>   ppc/pnv: Grab the XiveRouter object from XiveTCTX in
>     pnv_xive_get_tctx()
>   ppc/pnv: Introduce a pnv_xive_get_block_id() interface to XiveRouter
>   ppc/pnv: quiesce some XIVE errors
> 
>  include/hw/ppc/pnv_xive.h  |   3 -
>  include/hw/ppc/xive.h      |  21 +--
>  include/hw/ppc/xive_regs.h |  34 +++++
>  hw/intc/pnv_xive.c         | 210 +++++++++++++------------
>  hw/intc/spapr_xive.c       |   7 +-
>  hw/intc/xive.c             | 304 ++++++++++++++++++++++++++++++-------
>  hw/ppc/pnv_xscom.c         |  20 +++
>  7 files changed, 428 insertions(+), 171 deletions(-)
> 

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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