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[69.222.133.165]) by smtp.gmail.com with ESMTPSA id 206sm16077696ywk.44.2019.07.31.10.57.38 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 31 Jul 2019 10:57:38 -0700 (PDT) From: Jan Bobek To: qemu-devel@nongnu.org Date: Wed, 31 Jul 2019 13:56:40 -0400 Message-Id: <20190731175702.4916-1-jan.bobek@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::c43 Subject: [Qemu-devel] [RFC PATCH v1 00/22] reimplement (some) x86 vector instructions using tcg-gvec X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson , Jan Bobek Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This patch series is an early work-in-progress snapshot of my efforts to utilize the TCG gvec infrastracture in x86 frontend. Only a handful of instructions have been converted (those which have a direct gvec equivalent). The dispatch switch for the converted instructions is sort of hacked into gen_sse; this is obviously intended for development only. Eventually, everything that follows this switch will be removed, along with the SSE tables and all that goes along with it. Cheers, -Jan Jan Bobek (18): target/i386: introduce gen_ld_modrm_* helpers target/i386: introduce gen_gvec_ld_modrm_* helpers target/i386: add vector register file alignment constraints target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD target/i386: reimplement (V)POR, (V)ORPS, (V)ORPD target/i386: reimplement (V)PXOR, (V)XORPS, (V)XORPD target/i386: reimplement (V)PANDN, (V)ANDNPS, (V)ANDNPD target/i386: reimplement (V)PADD(B,W,D,Q) target/i386: reimplement (V)PSUB(B,W,D,Q) target/i386: reimplement (V)PADDS(B,W) target/i386: reimplement (V)PADDUS(B,W) target/i386: reimplement (V)PSUBS(B,W) target/i386: reimplement (V)PSUBUS(B,W) target/i386: reimplement (V)PMINSW target/i386: reimplement (V)PMINUB target/i386: reimplement (V)PMAXSW target/i386: reimplement (V)PMAXUB target/i386: reimplement (V)P(EQ,CMP)(B,W,D) Richard Henderson (4): target/i386: Push rex_r into DisasContext target/i386: Push rex_w into DisasContext target/i386: Use prefix, aflag and dflag from DisasContext target/i386: Simplify gen_exception arguments target/i386/cpu.h | 6 +- target/i386/ops_sse.h | 65 --- target/i386/ops_sse_header.h | 39 -- target/i386/translate.c | 990 +++++++++++++++++++++++++---------- 4 files changed, 723 insertions(+), 377 deletions(-) -- 2.20.1