From: Andrew Jones <drjones@redhat.com>
To: qemu-devel@nongnu.org, qemu-arm@nongnu.org
Cc: peter.maydell@linaro.org, richard.henderson@linaro.org,
armbru@redhat.com, eric.auger@redhat.com, imammedo@redhat.com,
alex.bennee@linaro.org, Dave.Martin@arm.com
Subject: [Qemu-devel] [PATCH v3 15/15] target/arm/kvm: host cpu: Add support for sve<vl-bits> properties
Date: Fri, 2 Aug 2019 14:25:40 +0200 [thread overview]
Message-ID: <20190802122540.26385-16-drjones@redhat.com> (raw)
In-Reply-To: <20190802122540.26385-1-drjones@redhat.com>
Allow cpu 'host' to enable SVE when it's available, unless the
user chooses to disable it with the added 'sve=off' cpu property.
Also give the user the ability to select vector lengths with the
sve<vl-bits> properties. We don't adopt 'max' cpu's other sve
property, sve-max-vq, because that property is difficult to
use with KVM. That property assumes all vector lengths in the
range from 1 up to and including the specified maximum length are
supported, but there may be optional lengths not supported by the
host in that range. With KVM one must be more specific when
enabling vector lengths.
Signed-off-by: Andrew Jones <drjones@redhat.com>
---
docs/arm-cpu-features.rst | 19 ++++++++++++-------
target/arm/cpu.c | 1 +
target/arm/cpu.h | 2 ++
target/arm/cpu64.c | 39 +++++++++++++++++++++++----------------
tests/arm-cpu-features.c | 15 ++++++++-------
5 files changed, 46 insertions(+), 30 deletions(-)
diff --git a/docs/arm-cpu-features.rst b/docs/arm-cpu-features.rst
index 4181539e06a5..dbf578ca231c 100644
--- a/docs/arm-cpu-features.rst
+++ b/docs/arm-cpu-features.rst
@@ -256,31 +256,36 @@ SVE CPU Property Examples
$ qemu-system-aarch64 -M virt -cpu max
- 3) Only enable the 128-bit vector length::
+ 3) When KVM is enabled, implicitly enable all host CPU supported vector
+ lengths with the `host` CPU type::
+
+ $ qemu-system-aarch64 -M virt,accel=kvm -cpu host
+
+ 4) Only enable the 128-bit vector length::
$ qemu-system-aarch64 -M virt -cpu max,sve128=on
- 4) Disable the 256-bit vector length and all larger vector lengths
+ 5) Disable the 256-bit vector length and all larger vector lengths
since 256 is a power-of-2 (this results in only the 128-bit length
being enabled)::
$ qemu-system-aarch64 -M virt -cpu max,sve256=off
- 5) Enable the 128-bit, 256-bit, and 512-bit vector lengths::
+ 6) Enable the 128-bit, 256-bit, and 512-bit vector lengths::
$ qemu-system-aarch64 -M virt -cpu max,sve128=on,sve256=on,sve512=on
- 6) The same as (5), but since the 128-bit and 256-bit vector
+ 7) The same as (6), but since the 128-bit and 256-bit vector
lengths are required for the 512-bit vector length to be enabled,
then allow them to be auto-enabled::
$ qemu-system-aarch64 -M virt -cpu max,sve512=on
- 7) Do the same as (6), but by first disabling SVE and then re-enabling it::
+ 8) Do the same as (7), but by first disabling SVE and then re-enabling it::
$ qemu-system-aarch64 -M virt -cpu max,sve=off,sve512=on,sve=on
- 8) Force errors regarding the last vector length::
+ 9) Force errors regarding the last vector length::
$ qemu-system-aarch64 -M virt -cpu max,sve128=off
$ qemu-system-aarch64 -M virt -cpu max,sve=off,sve128=off,sve=on
@@ -292,5 +297,5 @@ The examples in "SVE CPU Property Examples" exhibit many ways to select
vector lengths which developers may find useful in order to avoid overly
verbose command lines. However, the recommended way to select vector
lengths is to explicitly enable each desired length. Therefore only
-example's (1), (3), and (5) exhibit recommended uses of the properties.
+example's (1), (4), and (6) exhibit recommended uses of the properties.
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 842637ae0c49..901ae813563b 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2648,6 +2648,7 @@ static void arm_host_initfn(Object *obj)
ARMCPU *cpu = ARM_CPU(obj);
kvm_arm_set_cpu_features_from_host(cpu);
+ aarch64_add_sve_properties(obj);
arm_cpu_post_init(obj);
}
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index b6cd721c91f5..7993085bea28 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -972,11 +972,13 @@ int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq);
void aarch64_sve_change_el(CPUARMState *env, int old_el,
int new_el, bool el0_a64);
+void aarch64_add_sve_properties(Object *obj);
#else
static inline void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq) { }
static inline void aarch64_sve_change_el(CPUARMState *env, int o,
int n, bool a)
{ }
+static inline void aarch64_add_sve_properties(Object *obj) { }
#endif
#if !defined(CONFIG_TCG)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 0d0664b24865..0313eec88a66 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -714,6 +714,28 @@ static void cpu_arm_set_sve(Object *obj, Visitor *v, const char *name,
}
}
+void aarch64_add_sve_properties(Object *obj)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+ uint32_t vq;
+
+ object_property_add(obj, "sve", "bool", cpu_arm_get_sve,
+ cpu_arm_set_sve, NULL, NULL, &error_fatal);
+
+ /*
+ * sve_vq_map uses a special state while setting properties, so
+ * we initialize it here with its init function and finalize it
+ * in arm_cpu_realizefn().
+ */
+ arm_cpu_vq_map_init(cpu);
+ for (vq = 1; vq <= ARM_MAX_VQ; ++vq) {
+ char name[8];
+ sprintf(name, "sve%d", vq * 128);
+ object_property_add(obj, name, "bool", cpu_arm_get_sve_vq,
+ cpu_arm_set_sve_vq, NULL, NULL, &error_fatal);
+ }
+}
+
/* -cpu max: if KVM is enabled, like -cpu host (best possible with this host);
* otherwise, a CPU with as many features enabled as our emulation supports.
* The version of '-cpu max' for qemu-system-arm is defined in cpu.c;
@@ -722,7 +744,6 @@ static void cpu_arm_set_sve(Object *obj, Visitor *v, const char *name,
static void aarch64_max_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
- uint32_t vq;
uint64_t t;
if (kvm_enabled()) {
@@ -813,23 +834,9 @@ static void aarch64_max_initfn(Object *obj)
#endif
}
- object_property_add(obj, "sve", "bool", cpu_arm_get_sve,
- cpu_arm_set_sve, NULL, NULL, &error_fatal);
+ aarch64_add_sve_properties(obj);
object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_max_vq,
cpu_max_set_sve_max_vq, NULL, NULL, &error_fatal);
-
- /*
- * sve_vq_map uses a special state while setting properties, so
- * we initialize it here with its init function and finalize it
- * in arm_cpu_realizefn().
- */
- arm_cpu_vq_map_init(cpu);
- for (vq = 1; vq <= ARM_MAX_VQ; ++vq) {
- char name[8];
- sprintf(name, "sve%d", vq * 128);
- object_property_add(obj, name, "bool", cpu_arm_get_sve_vq,
- cpu_arm_set_sve_vq, NULL, NULL, &error_fatal);
- }
}
struct ARMCPUInfo {
diff --git a/tests/arm-cpu-features.c b/tests/arm-cpu-features.c
index 720741375bc8..229f3cf64b12 100644
--- a/tests/arm-cpu-features.c
+++ b/tests/arm-cpu-features.c
@@ -359,7 +359,7 @@ static void sve_tests_sve_off_kvm(const void *data)
{
QTestState *qts;
- qts = qtest_init(MACHINE "-accel kvm -cpu max,sve=off");
+ qts = qtest_init(MACHINE "-accel kvm -cpu host,sve=off");
/*
* We don't know if this host supports SVE so we don't
@@ -436,8 +436,8 @@ static void test_query_cpu_model_expansion_kvm(const void *data)
"We cannot guarantee the CPU type 'cortex-a15' works "
"with KVM on this host", NULL);
- assert_has_feature(qts, "max", "sve");
- resp = do_query_no_props(qts, "max");
+ assert_has_feature(qts, "host", "sve");
+ resp = do_query_no_props(qts, "host");
kvm_supports_sve = resp_get_feature(resp, "sve");
vls = resp_get_sve_vls(resp);
qobject_unref(resp);
@@ -448,10 +448,10 @@ static void test_query_cpu_model_expansion_kvm(const void *data)
/* Enabling a supported length is of course fine. */
sprintf(name, "sve%d", max_vq * 128);
- assert_sve_vls(qts, "max", vls, "{ %s: true }", name);
+ assert_sve_vls(qts, "host", vls, "{ %s: true }", name);
/* Also disabling the largest lengths is fine. */
- assert_sve_vls(qts, "max", (vls & ~BIT(max_vq - 1)),
+ assert_sve_vls(qts, "host", (vls & ~BIT(max_vq - 1)),
"{ %s: false }", name);
for (vq = 1; vq <= max_vq; ++vq) {
@@ -463,7 +463,7 @@ static void test_query_cpu_model_expansion_kvm(const void *data)
if (vq <= SVE_MAX_VQ) {
sprintf(name, "sve%d", vq * 128);
error = g_strdup_printf("cannot enable %s", name);
- assert_error(qts, "max", error, "{ %s: true }", name);
+ assert_error(qts, "host", error, "{ %s: true }", name);
g_free(error);
}
@@ -476,13 +476,14 @@ static void test_query_cpu_model_expansion_kvm(const void *data)
vq = 64 - __builtin_clzll(vls & ~BIT(max_vq - 1));
sprintf(name, "sve%d", vq * 128);
error = g_strdup_printf("cannot disable %s", name);
- assert_error(qts, "max", error, "{ %s: false }", name);
+ assert_error(qts, "host", error, "{ %s: false }", name);
g_free(error);
}
} else {
g_assert(vls == 0);
}
} else {
+ assert_has_not_feature(qts, "host", "sve");
assert_error(qts, "host",
"'pmu' feature not supported by KVM on this host",
"{ 'pmu': true }");
--
2.20.1
next prev parent reply other threads:[~2019-08-02 12:30 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-02 12:25 [Qemu-devel] [PATCH v3 00/15] target/arm/kvm: enable SVE in guests Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 01/15] target/arm/cpu64: Ensure kvm really supports aarch64=off Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 02/15] target/arm/cpu: Ensure we can use the pmu with kvm Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 03/15] target/arm/monitor: Introduce qmp_query_cpu_model_expansion Andrew Jones
2019-08-02 16:27 ` Richard Henderson
2019-08-03 1:28 ` Richard Henderson
2019-08-06 12:21 ` Andrew Jones
2019-08-07 15:22 ` Richard Henderson
2019-08-08 8:50 ` Andrew Jones
2019-08-08 18:37 ` Richard Henderson
2019-08-09 16:09 ` Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 04/15] tests: arm: Introduce cpu feature tests Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 05/15] target/arm/helper: zcr: Add build bug next to value range assumption Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 06/15] target/arm/cpu: Use div-round-up to determine predicate register array size Andrew Jones
2019-08-02 16:33 ` Richard Henderson
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 07/15] target/arm: Allow SVE to be disabled via a CPU property Andrew Jones
2019-08-02 16:35 ` Richard Henderson
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 08/15] target/arm/cpu64: max cpu: Introduce sve<vl-bits> properties Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 09/15] target/arm/kvm64: Fix error returns Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 10/15] target/arm/kvm64: Move the get/put of fpsimd registers out Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 11/15] target/arm/kvm64: Add kvm_arch_get/put_sve Andrew Jones
2019-08-02 18:07 ` Richard Henderson
2019-08-06 12:24 ` Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 12/15] target/arm/kvm64: max cpu: Enable SVE when available Andrew Jones
2019-08-02 18:20 ` Richard Henderson
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 13/15] target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 14/15] target/arm/cpu64: max cpu: Support sve properties with KVM Andrew Jones
2019-08-02 12:25 ` Andrew Jones [this message]
2019-08-10 1:31 ` [Qemu-devel] [PATCH] HACK: Centralize sve property checks Richard Henderson
2019-09-04 8:32 ` Andrew Jones
2019-09-04 17:17 ` Richard Henderson
2019-09-04 17:18 ` Richard Henderson
2019-08-15 8:31 ` [Qemu-devel] [PATCH v3 00/15] target/arm/kvm: enable SVE in guests Peter Maydell
2019-08-15 8:45 ` Andrew Jones
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