From: Andrew Jones <drjones@redhat.com>
To: qemu-devel@nongnu.org, qemu-arm@nongnu.org
Cc: peter.maydell@linaro.org, richard.henderson@linaro.org,
armbru@redhat.com, eric.auger@redhat.com, imammedo@redhat.com,
alex.bennee@linaro.org, Dave.Martin@arm.com
Subject: [Qemu-devel] [PATCH v3 05/15] target/arm/helper: zcr: Add build bug next to value range assumption
Date: Fri, 2 Aug 2019 14:25:30 +0200 [thread overview]
Message-ID: <20190802122540.26385-6-drjones@redhat.com> (raw)
In-Reply-To: <20190802122540.26385-1-drjones@redhat.com>
The current implementation of ZCR_ELx matches the architecture, only
implementing the lower four bits, with the rest RAZ/WI. This puts
a strict limit on ARM_MAX_VQ of 16. Make sure we don't let ARM_MAX_VQ
grow without a corresponding update here.
Suggested-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
---
target/arm/helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index b74c23a9bc08..3064067c69a6 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5300,6 +5300,7 @@ static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
int new_len;
/* Bits other than [3:0] are RAZ/WI. */
+ QEMU_BUILD_BUG_ON(ARM_MAX_VQ > 16);
raw_write(env, ri, value & 0xf);
/*
--
2.20.1
next prev parent reply other threads:[~2019-08-02 12:28 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-02 12:25 [Qemu-devel] [PATCH v3 00/15] target/arm/kvm: enable SVE in guests Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 01/15] target/arm/cpu64: Ensure kvm really supports aarch64=off Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 02/15] target/arm/cpu: Ensure we can use the pmu with kvm Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 03/15] target/arm/monitor: Introduce qmp_query_cpu_model_expansion Andrew Jones
2019-08-02 16:27 ` Richard Henderson
2019-08-03 1:28 ` Richard Henderson
2019-08-06 12:21 ` Andrew Jones
2019-08-07 15:22 ` Richard Henderson
2019-08-08 8:50 ` Andrew Jones
2019-08-08 18:37 ` Richard Henderson
2019-08-09 16:09 ` Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 04/15] tests: arm: Introduce cpu feature tests Andrew Jones
2019-08-02 12:25 ` Andrew Jones [this message]
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 06/15] target/arm/cpu: Use div-round-up to determine predicate register array size Andrew Jones
2019-08-02 16:33 ` Richard Henderson
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 07/15] target/arm: Allow SVE to be disabled via a CPU property Andrew Jones
2019-08-02 16:35 ` Richard Henderson
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 08/15] target/arm/cpu64: max cpu: Introduce sve<vl-bits> properties Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 09/15] target/arm/kvm64: Fix error returns Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 10/15] target/arm/kvm64: Move the get/put of fpsimd registers out Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 11/15] target/arm/kvm64: Add kvm_arch_get/put_sve Andrew Jones
2019-08-02 18:07 ` Richard Henderson
2019-08-06 12:24 ` Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 12/15] target/arm/kvm64: max cpu: Enable SVE when available Andrew Jones
2019-08-02 18:20 ` Richard Henderson
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 13/15] target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 14/15] target/arm/cpu64: max cpu: Support sve properties with KVM Andrew Jones
2019-08-02 12:25 ` [Qemu-devel] [PATCH v3 15/15] target/arm/kvm: host cpu: Add support for sve<vl-bits> properties Andrew Jones
2019-08-10 1:31 ` [Qemu-devel] [PATCH] HACK: Centralize sve property checks Richard Henderson
2019-09-04 8:32 ` Andrew Jones
2019-09-04 17:17 ` Richard Henderson
2019-09-04 17:18 ` Richard Henderson
2019-08-15 8:31 ` [Qemu-devel] [PATCH v3 00/15] target/arm/kvm: enable SVE in guests Peter Maydell
2019-08-15 8:45 ` Andrew Jones
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190802122540.26385-6-drjones@redhat.com \
--to=drjones@redhat.com \
--cc=Dave.Martin@arm.com \
--cc=alex.bennee@linaro.org \
--cc=armbru@redhat.com \
--cc=eric.auger@redhat.com \
--cc=imammedo@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).