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[79.181.91.42]) by smtp.gmail.com with ESMTPSA id d123sm44741955qkb.94.2019.08.09.09.35.24 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Fri, 09 Aug 2019 09:35:26 -0700 (PDT) Date: Fri, 9 Aug 2019 12:35:22 -0400 From: "Michael S. Tsirkin" To: Julia Suvorova Message-ID: <20190809123341-mutt-send-email-mst@kernel.org> References: <20190807082241.23984-1-jusual@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190807082241.23984-1-jusual@redhat.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.222.193 Subject: Re: [Qemu-devel] [PATCH] virtio-pci: Add Function Level Reset support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alex Williamson , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Wed, Aug 07, 2019 at 10:22:41AM +0200, Julia Suvorova wrote: > Using FLR becomes convenient in cases where resetting the bus is > impractical, for example, when debugging the behavior of individual > functions. > > Signed-off-by: Julia Suvorova > --- > hw/virtio/virtio-pci.c | 10 ++++++++++ > hw/virtio/virtio-pci.h | 1 + > 2 files changed, 11 insertions(+) > > diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c > index f6d2223e78..37c5d6efbc 100644 > --- a/hw/virtio/virtio-pci.c > +++ b/hw/virtio/virtio-pci.c > @@ -599,6 +599,10 @@ static void virtio_write_config(PCIDevice *pci_dev, uint32_t address, > > pci_default_write_config(pci_dev, address, val, len); > > + if (proxy->has_flr) { > + pcie_cap_flr_write_config(pci_dev, address, val, len); > + } > + > if (range_covers_byte(address, len, PCI_COMMAND) && > !(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { > virtio_pci_stop_ioeventfd(proxy); > @@ -1718,6 +1722,8 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) > proxy->notify_pio.size = 0x4; > proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG; > > + proxy->has_flr = false; > + > /* subclasses can enforce modern, so do this unconditionally */ > memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci", > /* PCI BAR regions must be powers of 2 */ > @@ -1749,6 +1755,10 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) > > pci_dev->exp.pm_cap = pos; > > + /* Set Function Level Reset capability bit */ > + pcie_cap_flr_init(pci_dev); > + proxy->has_flr = true; > + > /* > * Indicates that this function complies with revision 1.2 of the > * PCI Power Management Interface Specification. I don't think we can set this for everyone: this will break things like cross version migration. > diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h > index 292275acb1..16d293a6bf 100644 > --- a/hw/virtio/virtio-pci.h > +++ b/hw/virtio/virtio-pci.h > @@ -152,6 +152,7 @@ struct VirtIOPCIProxy { > VirtIOIRQFD *vector_irqfd; > int nvqs_with_notifiers; > VirtioBusState bus; > + bool has_flr; > }; > > static inline bool virtio_pci_modern(VirtIOPCIProxy *proxy) > -- > 2.21.0