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From: Jan Bobek <jan.bobek@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Jan Bobek" <jan.bobek@gmail.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Richard Henderson" <richard.henderson@linaro.org>
Subject: [Qemu-devel] [RFC PATCH v3 31/46] target/i386: introduce helper-based code generator macros
Date: Wed, 14 Aug 2019 22:09:13 -0400	[thread overview]
Message-ID: <20190815020928.9679-32-jan.bobek@gmail.com> (raw)
In-Reply-To: <20190815020928.9679-1-jan.bobek@gmail.com>

Code generators defined using these macros rely on a helper function
(as emitted by gen_helper_*).

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/translate.c | 106 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 106 insertions(+)

diff --git a/target/i386/translate.c b/target/i386/translate.c
index b5f609e147..b28d651b82 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -5245,6 +5245,112 @@ INSNOP_LDST(xmm_t0, Mhq)
         insnop_arg_t(opT1) arg1, insnop_arg_t(opT2) arg2,       \
         insnop_arg_t(opT3) arg3, insnop_arg_t(opT4) arg4)
 
+#define DEF_GEN_INSN0_HELPER(mnem, helper)      \
+    GEN_INSN0(mnem)                             \
+    {                                           \
+        gen_helper_ ## helper(cpu_env);         \
+    }
+
+#define DEF_GEN_INSN2_HELPER_EPD(mnem, helper, opT1, opT2)      \
+    GEN_INSN2(mnem, opT1, opT2)                                 \
+    {                                                           \
+        const TCGv_ptr arg1_ptr = tcg_temp_new_ptr();           \
+                                                                \
+        tcg_gen_addi_ptr(arg1_ptr, cpu_env, arg1);              \
+        gen_helper_ ## helper(cpu_env, arg1_ptr, arg2);         \
+                                                                \
+        tcg_temp_free_ptr(arg1_ptr);                            \
+    }
+#define DEF_GEN_INSN2_HELPER_DEP(mnem, helper, opT1, opT2)      \
+    GEN_INSN2(mnem, opT1, opT2)                                 \
+    {                                                           \
+        const TCGv_ptr arg2_ptr = tcg_temp_new_ptr();           \
+                                                                \
+        tcg_gen_addi_ptr(arg2_ptr, cpu_env, arg2);              \
+        gen_helper_ ## helper(arg1, cpu_env, arg2_ptr);         \
+                                                                \
+        tcg_temp_free_ptr(arg2_ptr);                            \
+    }
+#ifdef TARGET_X86_64
+#define DEF_GEN_INSN2_HELPER_EPQ(mnem, helper, opT1, opT2)      \
+    DEF_GEN_INSN2_HELPER_EPD(mnem, helper, opT1, opT2)
+#define DEF_GEN_INSN2_HELPER_QEP(mnem, helper, opT1, opT2)      \
+    DEF_GEN_INSN2_HELPER_DEP(mnem, helper, opT1, opT2)
+#else /* !TARGET_X86_64 */
+#define DEF_GEN_INSN2_HELPER_EPQ(mnem, helper, opT1, opT2)      \
+    GEN_INSN2(mnem, opT1, opT2)                                 \
+    {                                                           \
+        g_assert_not_reached();                                 \
+    }
+#define DEF_GEN_INSN2_HELPER_QEP(mnem, helper, opT1, opT2)      \
+    GEN_INSN2(mnem, opT1, opT2)                                 \
+    {                                                           \
+        g_assert_not_reached();                                 \
+    }
+#endif /* !TARGET_X86_64 */
+#define DEF_GEN_INSN2_HELPER_EPP(mnem, helper, opT1, opT2)      \
+    GEN_INSN2(mnem, opT1, opT2)                                 \
+    {                                                           \
+        const TCGv_ptr arg1_ptr = tcg_temp_new_ptr();           \
+        const TCGv_ptr arg2_ptr = tcg_temp_new_ptr();           \
+                                                                \
+        tcg_gen_addi_ptr(arg1_ptr, cpu_env, arg1);              \
+        tcg_gen_addi_ptr(arg2_ptr, cpu_env, arg2);              \
+        gen_helper_ ## helper(cpu_env, arg1_ptr, arg2_ptr);     \
+                                                                \
+        tcg_temp_free_ptr(arg1_ptr);                            \
+        tcg_temp_free_ptr(arg2_ptr);                            \
+    }
+
+#define DEF_GEN_INSN3_HELPER_EPP(mnem, helper, opT1, opT2, opT3)        \
+    GEN_INSN3(mnem, opT1, opT2, opT3)                                   \
+    {                                                                   \
+        const TCGv_ptr arg1_ptr = tcg_temp_new_ptr();                   \
+        const TCGv_ptr arg3_ptr = tcg_temp_new_ptr();                   \
+                                                                        \
+        assert(arg1 == arg2);                                           \
+        tcg_gen_addi_ptr(arg1_ptr, cpu_env, arg1);                      \
+        tcg_gen_addi_ptr(arg3_ptr, cpu_env, arg3);                      \
+        gen_helper_ ## helper(cpu_env, arg1_ptr, arg3_ptr);             \
+                                                                        \
+        tcg_temp_free_ptr(arg1_ptr);                                    \
+        tcg_temp_free_ptr(arg3_ptr);                                    \
+    }
+#define DEF_GEN_INSN3_HELPER_PPI(mnem, helper, opT1, opT2, opT3)        \
+    GEN_INSN3(mnem, opT1, opT2, opT3)                                   \
+    {                                                                   \
+        const TCGv_ptr arg1_ptr = tcg_temp_new_ptr();                   \
+        const TCGv_ptr arg2_ptr = tcg_temp_new_ptr();                   \
+        const TCGv_i32 arg3_r32 = tcg_temp_new_i32();                   \
+                                                                        \
+        tcg_gen_addi_ptr(arg1_ptr, cpu_env, arg1);                      \
+        tcg_gen_addi_ptr(arg2_ptr, cpu_env, arg2);                      \
+        tcg_gen_movi_i32(arg3_r32, arg3);                               \
+        gen_helper_ ## helper(arg1_ptr, arg2_ptr, arg3_r32);            \
+                                                                        \
+        tcg_temp_free_ptr(arg1_ptr);                                    \
+        tcg_temp_free_ptr(arg2_ptr);                                    \
+        tcg_temp_free_i32(arg3_r32);                                    \
+    }
+
+#define DEF_GEN_INSN4_HELPER_PPI(mnem, helper, opT1, opT2, opT3, opT4)  \
+    GEN_INSN4(mnem, opT1, opT2, opT3, opT4)                             \
+    {                                                                   \
+        const TCGv_ptr arg1_ptr = tcg_temp_new_ptr();                   \
+        const TCGv_ptr arg3_ptr = tcg_temp_new_ptr();                   \
+        const TCGv_i32 arg4_r32 = tcg_temp_new_i32();                   \
+                                                                        \
+        assert(arg1 == arg2);                                           \
+        tcg_gen_addi_ptr(arg1_ptr, cpu_env, arg1);                      \
+        tcg_gen_addi_ptr(arg3_ptr, cpu_env, arg3);                      \
+        tcg_gen_movi_i32(arg4_r32, arg4);                               \
+        gen_helper_ ## helper(arg1_ptr, arg3_ptr, arg4_r32);            \
+                                                                        \
+        tcg_temp_free_ptr(arg1_ptr);                                    \
+        tcg_temp_free_ptr(arg3_ptr);                                    \
+        tcg_temp_free_i32(arg4_r32);                                    \
+    }
+
 static void gen_sse_ng(CPUX86State *env, DisasContext *s, int b)
 {
     enum {
-- 
2.20.1



  parent reply	other threads:[~2019-08-15  2:41 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-15  2:08 [Qemu-devel] [RFC PATCH v3 00/46] rewrite MMX/SSE/SSE2/SSE3 instruction translation Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 01/46] target/i386: Push rex_r into DisasContext Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 02/46] target/i386: Push rex_w " Jan Bobek
2019-08-15  7:30   ` Aleksandar Markovic
2019-08-15  9:55     ` Richard Henderson
2019-08-15 10:19       ` Aleksandar Markovic
2019-08-21  5:12         ` Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 03/46] target/i386: reduce scope of variable aflag Jan Bobek
2019-08-15  7:16   ` Aleksandar Markovic
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 04/46] target/i386: use dflag from DisasContext Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 05/46] target/i386: use prefix " Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 06/46] target/i386: Simplify gen_exception arguments Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 07/46] target/i386: use pc_start from DisasContext Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 08/46] target/i386: make variable b1 const Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 09/46] target/i386: make variable is_xmm const Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 10/46] target/i386: add vector register file alignment constraints Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 11/46] target/i386: introduce gen_(ld, st)d_env_A0 Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 12/46] target/i386: introduce gen_sse_ng Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 13/46] target/i386: disable unused function warning temporarily Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 14/46] target/i386: introduce mnemonic aliases for several gvec operations Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 15/46] target/i386: introduce function ck_cpuid Jan Bobek
2019-08-15 15:01   ` Aleksandar Markovic
2019-08-15 15:16     ` Richard Henderson
2019-08-21  5:07     ` Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 16/46] target/i386: introduce instruction operand infrastructure Jan Bobek
2019-08-15  2:08 ` [Qemu-devel] [RFC PATCH v3 17/46] target/i386: introduce generic operand alias Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 18/46] target/i386: introduce generic either-or operand Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 19/46] target/i386: introduce generic load-store operand Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 20/46] target/i386: introduce tcg_temp operands Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 21/46] target/i386: introduce modrm operand Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 22/46] target/i386: introduce operands for decoding modrm fields Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 23/46] target/i386: introduce operand for direct-only r/m field Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 24/46] target/i386: introduce operand vex_v Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 25/46] target/i386: introduce Ib (immediate) operand Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 26/46] target/i386: introduce M* (memptr) operands Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 27/46] target/i386: introduce G*, R*, E* (general register) operands Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 28/46] target/i386: introduce P*, N*, Q* (MMX) operands Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 29/46] target/i386: introduce H*, V*, U*, W* (SSE/AVX) operands Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 30/46] target/i386: introduce code generators Jan Bobek
2019-08-15  2:09 ` Jan Bobek [this message]
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 32/46] target/i386: introduce gvec-based code generator macros Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 33/46] target/i386: introduce sse-opcode.inc.h Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 34/46] target/i386: introduce instruction translator macros Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 35/46] target/i386: introduce MMX translators Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 36/46] target/i386: introduce MMX code generators Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 37/46] target/i386: introduce MMX instructions to sse-opcode.inc.h Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 38/46] target/i386: introduce SSE translators Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 39/46] target/i386: introduce SSE code generators Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 40/46] target/i386: introduce SSE instructions to sse-opcode.inc.h Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 41/46] target/i386: introduce SSE2 translators Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 42/46] target/i386: introduce SSE2 code generators Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 43/46] target/i386: introduce SSE2 instructions to sse-opcode.inc.h Jan Bobek
2019-08-15  8:00   ` Aleksandar Markovic
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 44/46] target/i386: introduce SSE3 translators Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 45/46] target/i386: introduce SSE3 code generators Jan Bobek
2019-08-15  2:09 ` [Qemu-devel] [RFC PATCH v3 46/46] target/i386: introduce SSE3 instructions to sse-opcode.inc.h Jan Bobek
     [not found]   ` <CAL1e-=gZF1+=Gduqm4TwS0p-G6rvb4q+rw+hL9nzAz3P-r3+BQ@mail.gmail.com>
2019-08-15  9:49     ` Richard Henderson
2019-08-15 10:07       ` Aleksandar Markovic
2019-08-21  5:04         ` Jan Bobek
2019-08-15  3:06 ` [Qemu-devel] [RFC PATCH v3 00/46] rewrite MMX/SSE/SSE2/SSE3 instruction translation no-reply

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