From: David Hildenbrand <david@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Thomas Huth" <thuth@redhat.com>,
"Janosch Frank" <frankja@linux.ibm.com>,
"David Hildenbrand" <david@redhat.com>,
"Cornelia Huck" <cohuck@redhat.com>,
"Halil Pasic" <pasic@linux.ibm.com>,
"Christian Borntraeger" <borntraeger@de.ibm.com>,
qemu-s390x@nongnu.org, "Alex Bennée" <alex.bennee@linaro.org>,
"Richard Henderson" <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH v3 5/6] s390x/mmu: Better storage key reference and change bit handling
Date: Fri, 16 Aug 2019 10:47:07 +0200 [thread overview]
Message-ID: <20190816084708.602-6-david@redhat.com> (raw)
In-Reply-To: <20190816084708.602-1-david@redhat.com>
Any access sets the reference bit. In case we have a read-fault, we
should not allow writes to the TLB entry if the change bit was not
already set.
This is a preparation for proper storage-key reference/change bit handling
in TCG and a fix for KVM whereby read accesses would set the change
bit (old KVM versions without the ioctl to carry out the translation).
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
---
target/s390x/mmu_helper.c | 24 +++++++++++++++++++-----
1 file changed, 19 insertions(+), 5 deletions(-)
diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c
index d22c6b9c81..6cc81a29b6 100644
--- a/target/s390x/mmu_helper.c
+++ b/target/s390x/mmu_helper.c
@@ -420,14 +420,28 @@ nodat:
return 0;
}
- if (*flags & PAGE_READ) {
- key |= SK_R;
- }
-
- if (*flags & PAGE_WRITE) {
+ switch (rw) {
+ case MMU_DATA_LOAD:
+ case MMU_INST_FETCH:
+ /*
+ * The TLB entry has to remain write-protected on read-faults if
+ * the storage key does not indicate a change already. Otherwise
+ * we might miss setting the change bit on write accesses.
+ */
+ if (!(key & SK_C)) {
+ *flags &= ~PAGE_WRITE;
+ }
+ break;
+ case MMU_DATA_STORE:
key |= SK_C;
+ break;
+ default:
+ g_assert_not_reached();
}
+ /* Any store/fetch sets the reference bit */
+ key |= SK_R;
+
r = skeyclass->set_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key);
if (r) {
trace_set_skeys_nonzero(r);
--
2.21.0
next prev parent reply other threads:[~2019-08-16 8:51 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-16 8:47 [Qemu-devel] [PATCH v3 0/6] s390x/mmu: Storage key reference and change bit handling David Hildenbrand
2019-08-16 8:47 ` [Qemu-devel] [PATCH v3 1/6] s390x/mmu: Trace the right value if setting/getting the storage key fails David Hildenbrand
2019-08-19 9:44 ` Cornelia Huck
2019-08-16 8:47 ` [Qemu-devel] [PATCH v3 2/6] s390x/mmu: ASC selection in s390_cpu_get_phys_page_debug() David Hildenbrand
2019-08-16 8:47 ` [Qemu-devel] [PATCH v3 3/6] s390x/tcg: Rework MMU selection for instruction fetches David Hildenbrand
2019-08-19 9:45 ` Cornelia Huck
2019-08-16 8:47 ` [Qemu-devel] [PATCH v3 4/6] s390x/tcg: Flush the TLB of all CPUs on SSKE and RRBE David Hildenbrand
2019-08-19 11:06 ` Alex Bennée
2019-08-16 8:47 ` David Hildenbrand [this message]
2019-08-16 8:47 ` [Qemu-devel] [PATCH v3 6/6] s390x/mmu: Factor out storage key handling David Hildenbrand
2019-08-19 9:46 ` [Qemu-devel] [PATCH v3 0/6] s390x/mmu: Storage key reference and change bit handling Cornelia Huck
2019-08-19 9:53 ` David Hildenbrand
2019-08-19 16:38 ` Cornelia Huck
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