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From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Thomas Huth" <thuth@redhat.com>,
	qemu-arm@nongnu.org, "Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>
Subject: [Qemu-devel] [PATCH 2/4] target/arm: Restrict R and M profiles to TCG
Date: Fri, 23 Aug 2019 15:58:09 +0200	[thread overview]
Message-ID: <20190823135811.13883-3-philmd@redhat.com> (raw)
In-Reply-To: <20190823135811.13883-1-philmd@redhat.com>

KVM is only able to run A profile cpus.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 target/arm/cpu.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 522485a2de..299c59fde4 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -462,7 +462,9 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
     return ret;
 }
 
-#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
+/* CPU models. These are not needed for the AArch64 linux-user build. */
+#if (!defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)) \
+    && defined(CONFIG_TCG)
 static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
 {
     CPUClass *cc = CPU_GET_CLASS(cs);
@@ -1902,8 +1904,6 @@ static void cortex_m0_initfn(Object *obj)
     cpu->midr = 0x410cc200;
 }
 
-#endif
-
 static void cortex_m3_initfn(Object *obj)
 {
     ARMCPU *cpu = ARM_CPU(obj);
@@ -2057,6 +2057,8 @@ static void cortex_r5f_initfn(Object *obj)
     cpu->isar.mvfr1 = 0x00000011;
 }
 
+#endif
+
 static const ARMCPRegInfo cortexa8_cp_reginfo[] = {
     { .name = "L2LOCKDOWN", .cp = 15, .crn = 9, .crm = 0, .opc1 = 1, .opc2 = 0,
       .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
@@ -2544,7 +2546,6 @@ static const ARMCPUInfo arm_cpus[] = {
     { .name = "arm1176",     .initfn = arm1176_initfn },
     { .name = "arm11mpcore", .initfn = arm11mpcore_initfn },
     { .name = "cortex-m0",   .initfn = cortex_m0_initfn,
-#endif
                              .class_init = arm_v7m_class_init },
     { .name = "cortex-m3",   .initfn = cortex_m3_initfn,
                              .class_init = arm_v7m_class_init },
@@ -2554,6 +2555,7 @@ static const ARMCPUInfo arm_cpus[] = {
                              .class_init = arm_v7m_class_init },
     { .name = "cortex-r5",   .initfn = cortex_r5_initfn },
     { .name = "cortex-r5f",  .initfn = cortex_r5f_initfn },
+#endif
     { .name = "cortex-a7",   .initfn = cortex_a7_initfn },
     { .name = "cortex-a8",   .initfn = cortex_a8_initfn },
     { .name = "cortex-a9",   .initfn = cortex_a9_initfn },
-- 
2.20.1



  parent reply	other threads:[~2019-08-23 14:07 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-23 13:58 [Qemu-devel] [PATCH 0/4] Support disabling TCG on ARM (part 2) Philippe Mathieu-Daudé
2019-08-23 13:58 ` [Qemu-devel] [PATCH 1/4] target/arm: Restrict pre-ARMv7 cpus to TCG Philippe Mathieu-Daudé
2019-08-23 17:04   ` Richard Henderson
2019-08-29 18:04     ` Philippe Mathieu-Daudé
2019-08-23 13:58 ` Philippe Mathieu-Daudé [this message]
2019-08-23 17:06   ` [Qemu-devel] [PATCH 2/4] target/arm: Restrict R and M profiles " Richard Henderson
2019-08-23 13:58 ` [Qemu-devel] [PATCH 3/4] RFC target/arm: Do not build pre-ARMv7 cpus when using KVM Philippe Mathieu-Daudé
2019-08-23 14:28   ` Thomas Huth
2019-08-29 18:19     ` Philippe Mathieu-Daudé
2019-08-30  5:35       ` Thomas Huth
2019-08-23 17:12   ` Richard Henderson
2019-08-29 18:08     ` Philippe Mathieu-Daudé
2019-08-23 13:58 ` [Qemu-devel] [PATCH 4/4] RFC target/arm: Do not build A/M-profile " Philippe Mathieu-Daudé
2019-08-23 17:14   ` Richard Henderson

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