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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id q8sm551374pje.2.2019.08.26.09.54.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Aug 2019 09:54:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 26 Aug 2019 09:54:34 -0700 Message-Id: <20190826165434.18403-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190826165434.18403-1-richard.henderson@linaro.org> References: <20190826165434.18403-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::644 Subject: [Qemu-devel] [PATCH 1/1] target/ppc: Fix do_float_check_status vs inexact X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, pc@us.ibm.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The underflow and inexact exceptions are not mutually exclusive. Check for both of them. Tidy the reset of FPSCR[FI]. Fixes: https://bugs.launchpad.net/bugs/1841442 Reported-by: Paul Clarke Signed-off-by: Richard Henderson --- target/ppc/fpu_helper.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 07bc9051b0..2e023c5204 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -630,19 +630,15 @@ static void do_float_check_status(CPUPPCState *env, uintptr_t raddr) { CPUState *cs = env_cpu(env); int status = get_float_exception_flags(&env->fp_status); - bool inexact_happened = false; if (status & float_flag_overflow) { float_overflow_excp(env); } else if (status & float_flag_underflow) { float_underflow_excp(env); - } else if (status & float_flag_inexact) { - float_inexact_excp(env); - inexact_happened = true; } - - /* if the inexact flag was not set */ - if (inexact_happened == false) { + if (status & float_flag_inexact) { + float_inexact_excp(env); + } else { env->fpscr &= ~(1 << FPSCR_FI); /* clear the FPSCR[FI] bit */ } -- 2.17.1