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Sun, 01 Sep 2019 09:35:14 +0000 Received: from abhmp0004.oracle.com (abhmp0004.oracle.com [141.146.116.10]) by userv0121.oracle.com (8.14.4/8.13.8) with ESMTP id x819ZDk8020295; Sun, 1 Sep 2019 09:35:13 GMT Received: from lap1 (/77.138.183.59) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Sun, 01 Sep 2019 02:35:13 -0700 Date: Sun, 1 Sep 2019 12:35:09 +0300 From: Yuval Shaia To: Marcel Apfelbaum Message-ID: <20190901093509.GC16041@lap1> References: <20190828142328.24561-1-skrtbhtngr@gmail.com> <20190828142328.24561-3-skrtbhtngr@gmail.com> <710966e9-d1ac-3c55-0a12-02ff19005531@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <710966e9-d1ac-3c55-0a12-02ff19005531@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-Proofpoint-Virus-Version: vendor=nai engine=6000 definitions=9366 signatures=668685 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1906280000 definitions=main-1909010112 X-Proofpoint-Virus-Version: vendor=nai engine=6000 definitions=9366 signatures=668685 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1906280000 definitions=main-1909010112 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 156.151.31.85 Subject: Re: [Qemu-devel] [PATCH v1 2/2] hw/pvrdma: add live migration support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sukrit Bhatnagar , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Sat, Aug 31, 2019 at 10:45:44PM +0300, Marcel Apfelbaum wrote: > > > On 8/28/19 5:23 PM, Sukrit Bhatnagar wrote: > > vmstate_pvrdma describes the PCI and MSIX states as well as the dma > > address for dsr and the gid table of device. > > vmstate_pvrdma_gids describes each gid in the gid table. > > > > pvrdma_post_save() does the job of unregistering gid entries from the > > backend device in the source host. > > > > pvrdma_post_load() maps to dsr using the loaded dma address, registers > > each loaded gid into the backend device, and finally calls load_dsr() > > to perform other mappings and ring init operations. > > > > Cc: Marcel Apfelbaum > > Cc: Yuval Shaia > > Signed-off-by: Sukrit Bhatnagar > > --- > > hw/rdma/vmw/pvrdma_main.c | 77 +++++++++++++++++++++++++++++++++++++++ > > 1 file changed, 77 insertions(+) > > > > diff --git a/hw/rdma/vmw/pvrdma_main.c b/hw/rdma/vmw/pvrdma_main.c > > index 6c90db96f9..6f8b56dea3 100644 > > --- a/hw/rdma/vmw/pvrdma_main.c > > +++ b/hw/rdma/vmw/pvrdma_main.c > > @@ -28,6 +28,7 @@ > > #include "sysemu/sysemu.h" > > #include "monitor/monitor.h" > > #include "hw/rdma/rdma.h" > > +#include "migration/register.h" > > #include "../rdma_rm.h" > > #include "../rdma_backend.h" > > @@ -593,6 +594,81 @@ static void pvrdma_shutdown_notifier(Notifier *n, void *opaque) > > pvrdma_fini(pci_dev); > > } > > +static int pvrdma_post_save(void *opaque) > > +{ > > + int i, rc; > > + PVRDMADev *dev = opaque; > > + > > + for (i = 0; i < MAX_GIDS; i++) { > > + > > No need for the extra line > > + if (!dev->rdma_dev_res.port.gid_tbl[i].gid.global.interface_id) { > > + continue; > > + } > > + rc = rdma_backend_del_gid(&dev->backend_dev, > > + dev->backend_eth_device_name, > > + &dev->rdma_dev_res.port.gid_tbl[i].gid); > > + if (rc) { > > + return -EINVAL; > > + } > > + } > > + > > + return 0; > > +} > > + > > +static int pvrdma_post_load(void *opaque, int version_id) > > +{ > > + int i, rc; > > + PVRDMADev *dev = opaque; > > + PCIDevice *pci_dev = PCI_DEVICE(dev); > > + DSRInfo *dsr_info = &dev->dsr_info; > > + > > + dsr_info->dsr = rdma_pci_dma_map(pci_dev, dsr_info->dma, > > + sizeof(struct pvrdma_device_shared_region)); > > + if (!dsr_info->dsr) { > > + rdma_error_report("Failed to map to DSR"); > > + return -ENOMEM; > > + } > > + > > + for (i = 0; i < MAX_GIDS; i++) { > > + > > The same here > > > + if (!dev->rdma_dev_res.port.gid_tbl[i].gid.global.interface_id) { > > + continue; > > + } > > + > > + rc = rdma_backend_add_gid(&dev->backend_dev, > > + dev->backend_eth_device_name, > > + &dev->rdma_dev_res.port.gid_tbl[i].gid); > > + if (rc) { > > + return -EINVAL; > > + } > > + } > > + > > + return load_dsr(dev); > > +} > > + > > +static const VMStateDescription vmstate_pvrdma_gids = { > > + .name = "pvrdma-gids", > > + .fields = (VMStateField[]) { > > + VMSTATE_UINT8_ARRAY_V(gid.raw, RdmaRmGid, 16, 0), > > Is 16 the array length? If yes, do we have same macro definition? > > > + VMSTATE_END_OF_LIST() > > + } > > +}; > > + > > +static const VMStateDescription vmstate_pvrdma = { > > + .name = PVRDMA_HW_NAME, > > + .post_save = pvrdma_post_save, > > + .post_load = pvrdma_post_load, > > + .fields = (VMStateField[]) { > > + VMSTATE_PCI_DEVICE(parent_obj, PVRDMADev), > > + VMSTATE_MSIX(parent_obj, PVRDMADev), > > + VMSTATE_UINT64(dsr_info.dma, PVRDMADev), > > + VMSTATE_STRUCT_ARRAY(rdma_dev_res.port.gid_tbl, PVRDMADev, > > + MAX_PORT_GIDS, 0, vmstate_pvrdma_gids, > > + RdmaRmGid), > > + VMSTATE_END_OF_LIST() > > + } > > +}; > > + > > static void pvrdma_realize(PCIDevice *pdev, Error **errp) > > { > > int rc = 0; > > @@ -688,6 +764,7 @@ static void pvrdma_class_init(ObjectClass *klass, void *data) > > dc->desc = "RDMA Device"; > > dc->props = pvrdma_dev_properties; > > + dc->vmsd = &vmstate_pvrdma; > > set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); > > ir->print_statistics = pvrdma_print_statistics; > > Very simple an elegant. > If I understand correctly the live migration of a pvrdma device with no > active workloads works with this patch, right? And no QPs also. > If yes, I think we should consider merging this code already. > Yuval, do you agree? Sure i do! Even with the limitation, this is huge enhancement that can be used right away. But first suggested some fixes, let's see v2. > > Thanks, > Marcel > >