From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Thomas Huth" <thuth@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
qemu-arm@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [Qemu-devel] [PATCH v2 4/5] target/arm: Restrict R and M profiles to TCG
Date: Tue, 3 Sep 2019 13:47:28 +0200 [thread overview]
Message-ID: <20190903114729.3400-5-philmd@redhat.com> (raw)
In-Reply-To: <20190903114729.3400-1-philmd@redhat.com>
KVM is only able to run on CPUs based on the A-Profile architecture.
The following CPUs are disabled:
* M-Profile Architecture
- Cortex-M3
- Cortex-M4
- Cortex-M33
* R-Profile Architecture
- Cortex-R5
- Cortex-R5F
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
v2: list cpus
---
target/arm/cpu.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index f69780147c..299c59fde4 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -462,7 +462,9 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
return ret;
}
-#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
+/* CPU models. These are not needed for the AArch64 linux-user build. */
+#if (!defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)) \
+ && defined(CONFIG_TCG)
static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
CPUClass *cc = CPU_GET_CLASS(cs);
@@ -1902,8 +1904,6 @@ static void cortex_m0_initfn(Object *obj)
cpu->midr = 0x410cc200;
}
-#endif
-
static void cortex_m3_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
@@ -2057,6 +2057,8 @@ static void cortex_r5f_initfn(Object *obj)
cpu->isar.mvfr1 = 0x00000011;
}
+#endif
+
static const ARMCPRegInfo cortexa8_cp_reginfo[] = {
{ .name = "L2LOCKDOWN", .cp = 15, .crn = 9, .crm = 0, .opc1 = 1, .opc2 = 0,
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
@@ -2545,7 +2547,6 @@ static const ARMCPUInfo arm_cpus[] = {
{ .name = "arm11mpcore", .initfn = arm11mpcore_initfn },
{ .name = "cortex-m0", .initfn = cortex_m0_initfn,
.class_init = arm_v7m_class_init },
-#endif
{ .name = "cortex-m3", .initfn = cortex_m3_initfn,
.class_init = arm_v7m_class_init },
{ .name = "cortex-m4", .initfn = cortex_m4_initfn,
@@ -2554,6 +2555,7 @@ static const ARMCPUInfo arm_cpus[] = {
.class_init = arm_v7m_class_init },
{ .name = "cortex-r5", .initfn = cortex_r5_initfn },
{ .name = "cortex-r5f", .initfn = cortex_r5f_initfn },
+#endif
{ .name = "cortex-a7", .initfn = cortex_a7_initfn },
{ .name = "cortex-a8", .initfn = cortex_a8_initfn },
{ .name = "cortex-a9", .initfn = cortex_a9_initfn },
--
2.20.1
next prev parent reply other threads:[~2019-09-03 11:51 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-03 11:47 [Qemu-devel] [PATCH v2 0/5] Support disabling TCG on ARM (part 2) Philippe Mathieu-Daudé
2019-09-03 11:47 ` [Qemu-devel] [PATCH v2 1/5] Kconfig: Expose CONFIG_TCG to minikconf.py Philippe Mathieu-Daudé
2019-09-03 11:57 ` Thomas Huth
2019-09-03 11:47 ` [Qemu-devel] [PATCH v2 2/5] target/arm: Restrict pre-ARMv7 cpus to TCG Philippe Mathieu-Daudé
2019-09-03 12:10 ` Thomas Huth
2019-09-03 13:37 ` Philippe Mathieu-Daudé
2019-09-03 14:16 ` Thomas Huth
2019-09-03 11:47 ` [Qemu-devel] [PATCH v2 3/5] hw/arm: " Philippe Mathieu-Daudé
2019-09-03 22:54 ` Alistair Francis
2019-09-03 11:47 ` Philippe Mathieu-Daudé [this message]
2019-09-03 11:47 ` [Qemu-devel] [PATCH v2 5/5] hw/arm: Restrict R and M profiles " Philippe Mathieu-Daudé
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