From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [Qemu-devel] [PATCH v4 30/69] target/arm: Diagnose too few registers in list for LDM/STM
Date: Wed, 4 Sep 2019 12:30:20 -0700 [thread overview]
Message-ID: <20190904193059.26202-31-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190904193059.26202-1-richard.henderson@linaro.org>
This has been a TODO item for quite a while. The minimum bit
count for A32 and T16 is 1, and for T32 is 2.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate.c | 26 ++++++++++++++++++--------
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index b67e7389d3..b623dbcd48 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -9846,7 +9846,7 @@ static void op_addr_block_post(DisasContext *s, arg_ldst_block *a,
}
}
-static bool op_stm(DisasContext *s, arg_ldst_block *a)
+static bool op_stm(DisasContext *s, arg_ldst_block *a, int min_n)
{
int i, j, n, list, mem_idx;
bool user = a->u;
@@ -9863,7 +9863,10 @@ static bool op_stm(DisasContext *s, arg_ldst_block *a)
list = a->list;
n = ctpop16(list);
- /* TODO: test invalid n == 0 case */
+ if (n < min_n) {
+ unallocated_encoding(s);
+ return true;
+ }
addr = op_addr_block_pre(s, a, n);
mem_idx = get_mem_index(s);
@@ -9896,7 +9899,8 @@ static bool op_stm(DisasContext *s, arg_ldst_block *a)
static bool trans_STM(DisasContext *s, arg_ldst_block *a)
{
- return op_stm(s, a);
+ /* BitCount(list) < 1 is UNPREDICTABLE */
+ return op_stm(s, a, 1);
}
static bool trans_STM_t32(DisasContext *s, arg_ldst_block *a)
@@ -9906,10 +9910,11 @@ static bool trans_STM_t32(DisasContext *s, arg_ldst_block *a)
unallocated_encoding(s);
return true;
}
- return op_stm(s, a);
+ /* BitCount(list) < 2 is UNPREDICTABLE */
+ return op_stm(s, a, 2);
}
-static bool do_ldm(DisasContext *s, arg_ldst_block *a)
+static bool do_ldm(DisasContext *s, arg_ldst_block *a, int min_n)
{
int i, j, n, list, mem_idx;
bool loaded_base;
@@ -9938,7 +9943,10 @@ static bool do_ldm(DisasContext *s, arg_ldst_block *a)
list = a->list;
n = ctpop16(list);
- /* TODO: test invalid n == 0 case */
+ if (n < min_n) {
+ unallocated_encoding(s);
+ return true;
+ }
addr = op_addr_block_pre(s, a, n);
mem_idx = get_mem_index(s);
@@ -10006,7 +10014,8 @@ static bool trans_LDM_a32(DisasContext *s, arg_ldst_block *a)
unallocated_encoding(s);
return true;
}
- return do_ldm(s, a);
+ /* BitCount(list) < 1 is UNPREDICTABLE */
+ return do_ldm(s, a, 1);
}
static bool trans_LDM_t32(DisasContext *s, arg_ldst_block *a)
@@ -10016,7 +10025,8 @@ static bool trans_LDM_t32(DisasContext *s, arg_ldst_block *a)
unallocated_encoding(s);
return true;
}
- return do_ldm(s, a);
+ /* BitCount(list) < 2 is UNPREDICTABLE */
+ return do_ldm(s, a, 2);
}
/*
--
2.17.1
next prev parent reply other threads:[~2019-09-04 20:02 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-04 19:29 [Qemu-devel] [PATCH v4 00/69] target/arm: Convert aa32 base isa to decodetree Richard Henderson
2019-09-04 19:29 ` [Qemu-devel] [PATCH v4 01/69] target/arm: Use store_reg_from_load in thumb2 code Richard Henderson
2019-09-04 19:29 ` [Qemu-devel] [PATCH v4 02/69] target/arm: Add stubs for aa32 decodetree Richard Henderson
2019-09-04 19:29 ` [Qemu-devel] [PATCH v4 03/69] target/arm: Convert Data Processing (register) Richard Henderson
2019-09-04 19:29 ` [Qemu-devel] [PATCH v4 04/69] target/arm: Convert Data Processing (reg-shifted-reg) Richard Henderson
2019-09-04 19:29 ` [Qemu-devel] [PATCH v4 05/69] target/arm: Convert Data Processing (immediate) Richard Henderson
2019-09-04 19:29 ` [Qemu-devel] [PATCH v4 06/69] target/arm: Convert multiply and multiply accumulate Richard Henderson
2019-09-04 19:29 ` [Qemu-devel] [PATCH v4 07/69] target/arm: Simplify UMAAL Richard Henderson
2019-09-04 19:29 ` [Qemu-devel] [PATCH v4 08/69] target/arm: Convert Saturating addition and subtraction Richard Henderson
2019-09-04 19:29 ` [Qemu-devel] [PATCH v4 09/69] target/arm: Convert Halfword multiply and multiply accumulate Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 10/69] target/arm: Simplify op_smlaxxx for SMLAL* Richard Henderson
2019-09-12 8:59 ` Laurent Desnogues
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 11/69] target/arm: Simplify op_smlawx for SMLAW* Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 12/69] target/arm: Convert MSR (immediate) and hints Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 13/69] target/arm: Convert MRS/MSR (banked, register) Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 14/69] target/arm: Convert Cyclic Redundancy Check Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 15/69] target/arm: Convert BX, BXJ, BLX (register) Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 16/69] target/arm: Convert CLZ Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 17/69] target/arm: Convert ERET Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 18/69] target/arm: Convert the rest of A32 Miscelaneous instructions Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 19/69] target/arm: Convert T32 ADDW/SUBW Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 20/69] target/arm: Convert load/store (register, immediate, literal) Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 21/69] target/arm: Convert Synchronization primitives Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 22/69] target/arm: Diagnose UNPREDICTABLE ldrex/strex cases Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 23/69] target/arm: Convert USAD8, USADA8, SBFX, UBFX, BFC, BFI, UDF Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 24/69] target/arm: Convert Parallel addition and subtraction Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 25/69] target/arm: Convert packing, unpacking, saturation, and reversal Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 26/69] target/arm: Convert Signed multiply, signed and unsigned divide Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 27/69] target/arm: Convert MOVW, MOVT Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 28/69] target/arm: Convert LDM, STM Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 29/69] target/arm: Diagnose writeback register in list for LDM for v7 Richard Henderson
2019-09-04 19:30 ` Richard Henderson [this message]
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 31/69] target/arm: Diagnose base == pc for LDM/STM Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 32/69] target/arm: Convert B, BL, BLX (immediate) Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 33/69] target/arm: Convert SVC Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 34/69] target/arm: Convert RFE and SRS Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 35/69] target/arm: Convert Clear-Exclusive, Barriers Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 36/69] target/arm: Convert CPS (privileged) Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 37/69] target/arm: Convert SETEND Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 38/69] target/arm: Convert PLI, PLD, PLDW Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 39/69] target/arm: Convert Unallocated memory hint Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 40/69] target/arm: Convert Table Branch Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 41/69] target/arm: Convert SG Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 42/69] target/arm: Convert TT Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 43/69] target/arm: Simplify disas_thumb2_insn Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 44/69] target/arm: Simplify disas_arm_insn Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 45/69] target/arm: Add skeleton for T16 decodetree Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 46/69] target/arm: Convert T16 data-processing (two low regs) Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 47/69] target/arm: Convert T16 load/store (register offset) Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 48/69] target/arm: Convert T16 load/store (immediate offset) Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 49/69] target/arm: Convert T16 add pc/sp (immediate) Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 50/69] target/arm: Convert T16 load/store multiple Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 51/69] target/arm: Convert T16 add/sub (3 low, 2 low and imm) Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 52/69] target/arm: Convert T16 one low register and immediate Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 53/69] target/arm: Convert T16 branch and exchange Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 54/69] target/arm: Convert T16 add, compare, move (two high registers) Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 55/69] target/arm: Convert T16 adjust sp (immediate) Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 56/69] target/arm: Convert T16, extract Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 57/69] target/arm: Convert T16, Change processor state Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 58/69] target/arm: Convert T16, Reverse bytes Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 59/69] target/arm: Convert T16, nop hints Richard Henderson
2019-09-05 10:49 ` Philippe Mathieu-Daudé
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 60/69] target/arm: Split gen_nop_hint Richard Henderson
2019-09-05 10:48 ` Philippe Mathieu-Daudé
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 61/69] target/arm: Convert T16, push and pop Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 62/69] target/arm: Convert T16, Conditional branches, Supervisor call Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 63/69] target/arm: Convert T16, Miscellaneous 16-bit instructions Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 64/69] target/arm: Convert T16, shift immediate Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 65/69] target/arm: Convert T16, load (literal) Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 66/69] target/arm: Convert T16, Unconditional branch Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 67/69] target/arm: Convert T16, long branches Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 68/69] target/arm: Clean up disas_thumb_insn Richard Henderson
2019-09-04 19:30 ` [Qemu-devel] [PATCH v4 69/69] target/arm: Inline gen_bx_im into callers Richard Henderson
2019-09-04 20:58 ` [Qemu-devel] [PATCH v4 00/69] target/arm: Convert aa32 base isa to decodetree no-reply
2019-09-05 15:28 ` Peter Maydell
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