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From: David Hildenbrand <david@redhat.com>
To: qemu-devel@nongnu.org
Cc: Thomas Huth <thuth@redhat.com>,
	David Hildenbrand <david@redhat.com>,
	Cornelia Huck <cohuck@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	qemu-s390x@nongnu.org, Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PULL SUBSYSTEM s390x 02/29] s390x/tcg: MVCL: Zero out unused bits of address
Date: Wed, 18 Sep 2019 17:28:55 +0200	[thread overview]
Message-ID: <20190918152922.18949-3-david@redhat.com> (raw)
In-Reply-To: <20190918152922.18949-1-david@redhat.com>

We have to zero out unused bits in 24 and 31-bit addressing mode.
Provide a new helper.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
---
 target/s390x/mem_helper.c | 23 +++++++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index 39ee9b3175..b02ad148e5 100644
--- a/target/s390x/mem_helper.c
+++ b/target/s390x/mem_helper.c
@@ -469,6 +469,25 @@ static inline uint64_t get_address(CPUS390XState *env, int reg)
     return wrap_address(env, env->regs[reg]);
 }
 
+/*
+ * Store the address to the given register, zeroing out unused leftmost
+ * bits in bit positions 32-63 (24-bit and 31-bit mode only).
+ */
+static inline void set_address_zero(CPUS390XState *env, int reg,
+                                    uint64_t address)
+{
+    if (env->psw.mask & PSW_MASK_64) {
+        env->regs[reg] = address;
+    } else {
+        if (!(env->psw.mask & PSW_MASK_32)) {
+            address &= 0x00ffffff;
+        } else {
+            address &= 0x7fffffff;
+        }
+        env->regs[reg] = deposit64(env->regs[reg], 0, 32, address);
+    }
+}
+
 static inline void set_address(CPUS390XState *env, int reg, uint64_t address)
 {
     if (env->psw.mask & PSW_MASK_64) {
@@ -772,8 +791,8 @@ uint32_t HELPER(mvcl)(CPUS390XState *env, uint32_t r1, uint32_t r2)
 
     env->regs[r1 + 1] = deposit64(env->regs[r1 + 1], 0, 24, destlen);
     env->regs[r2 + 1] = deposit64(env->regs[r2 + 1], 0, 24, srclen);
-    set_address(env, r1, dest);
-    set_address(env, r2, src);
+    set_address_zero(env, r1, dest);
+    set_address_zero(env, r2, src);
 
     return cc;
 }
-- 
2.21.0



  parent reply	other threads:[~2019-09-18 16:26 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-18 15:28 [Qemu-devel] [PULL SUBSYSTEM s390x 00/29] s390x/tcg: mem_helper: Fault-safe handling David Hildenbrand
2019-09-18 15:28 ` [Qemu-devel] [PULL SUBSYSTEM s390x 01/29] s390x/tcg: Reset exception_index to -1 instead of 0 David Hildenbrand
2019-09-18 15:28 ` David Hildenbrand [this message]
2019-09-18 15:28 ` [Qemu-devel] [PULL SUBSYSTEM s390x 03/29] s390x/tcg: MVCL: Detect destructive overlaps David Hildenbrand
2019-09-18 15:28 ` [Qemu-devel] [PULL SUBSYSTEM s390x 04/29] s390x/tcg: MVCL: Process max 4k bytes at a time David Hildenbrand
2019-09-18 15:28 ` [Qemu-devel] [PULL SUBSYSTEM s390x 05/29] s390x/tcg: MVC: Increment the length once David Hildenbrand
2019-09-18 15:28 ` [Qemu-devel] [PULL SUBSYSTEM s390x 06/29] s390x/tcg: MVC: Use is_destructive_overlap() David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 07/29] s390x/tcg: MVPG: Check for specification exceptions David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 08/29] s390x/tcg: MVPG: Properly wrap the addresses David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 09/29] s390x/tcg: MVCLU/MVCLE: Process max 4k bytes at a time David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 10/29] s390x/tcg: MVCS/MVCP: Check for special operation exceptions David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 11/29] s390x/tcg: MVCOS: Lengths are 32 bit in 24/31-bit mode David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 12/29] s390x/tcg: MVCS/MVCP: Properly wrap the length David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 13/29] s390x/tcg: MVST: Check for specification exceptions David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 14/29] s390x/tcg: MVST: Fix storing back the addresses to registers David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 15/29] s390x/tcg: Always use MMU_USER_IDX for CONFIG_USER_ONLY David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 16/29] s390x/tcg: Fault-safe memset David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 17/29] s390x/tcg: Fault-safe memmove David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 18/29] s390x/tcg: MVCS/MVCP: Use access_memmove() David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 19/29] s390x/tcg: MVC: Fault-safe handling on destructive overlaps David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 20/29] s390x/tcg: MVCLU: Fault-safe handling David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 21/29] s390x/tcg: OC: " David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 22/29] s390x/tcg: XC: " David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 23/29] s390x/tcg: NC: " David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 24/29] s390x/tcg: MVCIN: " David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 25/29] s390x/tcg: MVN: " David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 26/29] s390x/tcg: MVZ: " David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 27/29] s390x/tcg: MVST: " David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 28/29] s390x/tcg: MVO: " David Hildenbrand
2019-09-18 15:29 ` [Qemu-devel] [PULL SUBSYSTEM s390x 29/29] tests/tcg: target/s390x: Test MVO David Hildenbrand
2019-09-19 10:00 ` [Qemu-devel] [PULL SUBSYSTEM s390x 00/29] s390x/tcg: mem_helper: Fault-safe handling Cornelia Huck

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