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[79.176.40.226]) by smtp.gmail.com with ESMTPSA id x15sm634641qkh.44.2019.09.26.01.47.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 01:47:45 -0700 (PDT) Date: Thu, 26 Sep 2019 04:47:40 -0400 From: "Michael S. Tsirkin" To: qi1.zhang@intel.com Subject: Re: [PATCH] intel_iommu: TM field should not be in reserved bits Message-ID: <20190926044114-mutt-send-email-mst@kernel.org> References: <20190926054922.21110-1-qi1.zhang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190926054922.21110-1-qi1.zhang@intel.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, ehabkost@redhat.com, qemu-devel@nongnu.org, rth@twiddle.net Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Thu, Sep 26, 2019 at 01:49:22PM +0800, qi1.zhang@intel.com wrote: > From: "Zhang, Qi" > > When dt is supported, TM field should not be Reserved(0). > > Refer to VT-d Spec 9.8 > > Signed-off-by: Zhang, Qi > Signed-off-by: Qi, Yadong > --- > hw/i386/intel_iommu.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > index f1de8fdb75..2696ceeb9d 100644 > --- a/hw/i386/intel_iommu.c > +++ b/hw/i386/intel_iommu.c > @@ -3567,6 +3567,13 @@ static void vtd_init(IntelIOMMUState *s) > > if (x86_iommu->dt_supported) { > s->ecap |= VTD_ECAP_DT; > + vtd_paging_entry_rsvd_field[1] &= ~(1ULL << 62); > + vtd_paging_entry_rsvd_field[2] &= ~(1ULL << 62); > + vtd_paging_entry_rsvd_field[3] &= ~(1ULL << 62); > + > + vtd_paging_entry_rsvd_field[5] &= ~(1ULL << 62); > + vtd_paging_entry_rsvd_field[6] &= ~(1ULL << 62); > + vtd_paging_entry_rsvd_field[7] &= ~(1ULL << 62); Add a macro for this value, please. And I think it's cleaner to pass dt_supported flag to VTD_SPTE_PAGE_LX_RSVD_MASK and VTD_SPTE_LPAGE_LX_RSVD_MASK, rather than set bits then clear them selectively. > } > > if (x86_iommu->pt_supported) { > -- > 2.20.1