From: David Hildenbrand <david@redhat.com>
To: qemu-devel@nongnu.org
Cc: Thomas Huth <thuth@redhat.com>,
Janosch Frank <frankja@linux.ibm.com>,
David Hildenbrand <david@redhat.com>,
Cornelia Huck <cohuck@redhat.com>,
Halil Pasic <pasic@linux.ibm.com>,
Christian Borntraeger <borntraeger@de.ibm.com>,
qemu-s390x@nongnu.org, Richard Henderson <rth@twiddle.net>
Subject: [PATCH v1 3/5] s390x/mmu: Implement Instruction-Execution-Protection Facility
Date: Thu, 26 Sep 2019 12:16:25 +0200 [thread overview]
Message-ID: <20190926101627.23376-4-david@redhat.com> (raw)
In-Reply-To: <20190926101627.23376-1-david@redhat.com>
IEP support in the mmu is fairly easy. Set the right permissions for TLB
entries and properly report an exception.
Make sure to handle EDAT-2 by setting bit 56/60/61 of the TEID (TEC) to
the right values.
Let's keep s390_cpu_get_phys_page_debug() working even if IEP is
active. Switch MMU_DATA_LOAD - this has no other effects any more as the
ASC to be used is now fully selected outside of mmu_translate().
Signed-off-by: David Hildenbrand <david@redhat.com>
---
target/s390x/cpu.h | 1 +
target/s390x/helper.c | 6 +++++-
target/s390x/mmu_helper.c | 21 +++++++++++++++++++++
3 files changed, 27 insertions(+), 1 deletion(-)
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 690b94c8ea..6eb7c07013 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -315,6 +315,7 @@ extern const VMStateDescription vmstate_s390_cpu;
#define CR0_EDAT 0x0000000000800000ULL
#define CR0_AFP 0x0000000000040000ULL
#define CR0_VECTOR 0x0000000000020000ULL
+#define CR0_IEP 0x0000000000100000ULL
#define CR0_EMERGENCY_SIGNAL_SC 0x0000000000004000ULL
#define CR0_EXTERNAL_CALL_SC 0x0000000000002000ULL
#define CR0_CKC_SC 0x0000000000000800ULL
diff --git a/target/s390x/helper.c b/target/s390x/helper.c
index 948c0398d4..bf503b56ee 100644
--- a/target/s390x/helper.c
+++ b/target/s390x/helper.c
@@ -63,7 +63,11 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr vaddr)
asc = PSW_ASC_PRIMARY;
}
- if (mmu_translate(env, vaddr, MMU_INST_FETCH, asc, &raddr, &prot, false)) {
+ /*
+ * We want to read code even if IEP is active. Use MMU_DATA_LOAD instead
+ * of MMU_INST_FETCH.
+ */
+ if (mmu_translate(env, vaddr, MMU_DATA_LOAD, asc, &raddr, &prot, false)) {
return -1;
}
return raddr;
diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c
index 8abc5d31d8..ff8b077f82 100644
--- a/target/s390x/mmu_helper.c
+++ b/target/s390x/mmu_helper.c
@@ -121,6 +121,8 @@ static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr,
const bool edat1 = (env->cregs[0] & CR0_EDAT) &&
s390_has_feat(S390_FEAT_EDAT);
const bool edat2 = edat1 && s390_has_feat(S390_FEAT_EDAT_2);
+ const bool iep = (env->cregs[0] & CR0_IEP) &&
+ s390_has_feat(S390_FEAT_INSTRUCTION_EXEC_PROT);
const int asce_tl = asce & ASCE_TABLE_LENGTH;
const int asce_p = asce & ASCE_PRIVATE_SPACE;
hwaddr gaddr = asce & ASCE_ORIGIN;
@@ -227,6 +229,9 @@ static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr,
*flags &= ~PAGE_WRITE;
}
if (edat2 && (entry & REGION3_ENTRY_FC)) {
+ if (iep && (entry & REGION3_ENTRY_IEP)) {
+ *flags &= ~PAGE_EXEC;
+ }
*raddr = (entry & REGION3_ENTRY_RFAA) |
(vaddr & REGION3_ENTRY_RFAA);
return 0;
@@ -254,6 +259,9 @@ static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr,
*flags &= ~PAGE_WRITE;
}
if (edat1 && (entry & SEGMENT_ENTRY_FC)) {
+ if (iep && (entry & SEGMENT_ENTRY_IEP)) {
+ *flags &= ~PAGE_EXEC;
+ }
*raddr = (entry & SEGMENT_ENTRY_SFAA) |
(vaddr & ~SEGMENT_ENTRY_SFAA);
return 0;
@@ -276,6 +284,9 @@ static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr,
if (entry & PAGE_ENTRY_P) {
*flags &= ~PAGE_WRITE;
}
+ if (iep && (entry & PAGE_ENTRY_IEP)) {
+ *flags &= ~PAGE_EXEC;
+ }
*raddr = entry & TARGET_PAGE_MASK;
return 0;
@@ -434,6 +445,16 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc,
return -1;
}
+ /* check for Instruction-Execution-Protection */
+ if (unlikely(rw == MMU_INST_FETCH && !(*flags & PAGE_EXEC))) {
+ if (exc) {
+ /* IEP sets bit 56 and 61 */
+ tec |= 0x84;
+ trigger_access_exception(env, PGM_PROTECTION, ilen, tec);
+ }
+ return -1;
+ }
+
nodat:
/* Convert real address -> absolute address */
*raddr = mmu_real2abs(env, *raddr);
--
2.21.0
next prev parent reply other threads:[~2019-09-26 10:19 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-26 10:16 [PATCH v1 0/5] s390x/mmu: Implement more facilities David Hildenbrand
2019-09-26 10:16 ` [PATCH v1 1/5] s390x/mmu: Add EDAT2 translation support David Hildenbrand
2019-09-26 10:18 ` David Hildenbrand
2019-10-01 8:41 ` Thomas Huth
2019-10-01 8:51 ` David Hildenbrand
2019-10-01 8:55 ` Thomas Huth
2019-10-01 8:56 ` David Hildenbrand
2019-09-26 10:16 ` [PATCH v1 2/5] s390x/mmu: Implement ESOP-2 and access-exception-fetch/store-indication facility David Hildenbrand
2019-09-27 12:30 ` David Hildenbrand
2019-10-01 8:48 ` Thomas Huth
2019-09-26 10:16 ` David Hildenbrand [this message]
2019-10-01 9:06 ` [PATCH v1 3/5] s390x/mmu: Implement Instruction-Execution-Protection Facility Thomas Huth
2019-09-26 10:16 ` [PATCH v1 4/5] s390x/cpumodel: Prepare for changes of QEMU model David Hildenbrand
2019-09-26 10:16 ` [PATCH v1 5/5] s390x/cpumodel: Add new TCG features to QEMU cpu model David Hildenbrand
2019-10-07 17:00 ` Cornelia Huck
2019-10-04 13:23 ` [PATCH v1 0/5] s390x/mmu: Implement more facilities David Hildenbrand
2019-10-07 17:02 ` Cornelia Huck
2019-10-09 10:33 ` David Hildenbrand
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