From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: laurent.desnogues@gmail.com, peter.maydell@linaro.org,
qemu-arm@nongnu.org
Subject: [PATCH v6 05/20] target/arm: Split out rebuild_hflags_m32
Date: Fri, 11 Oct 2019 11:55:31 -0400 [thread overview]
Message-ID: <20191011155546.14342-6-richard.henderson@linaro.org> (raw)
In-Reply-To: <20191011155546.14342-1-richard.henderson@linaro.org>
Create a function to compute the values of the TBFLAG_A32 bits
that will be cached, and are used by M-profile.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper.c | 45 ++++++++++++++++++++++++++++++---------------
1 file changed, 30 insertions(+), 15 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 4c65476d93..d4303420da 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11083,6 +11083,29 @@ static uint32_t rebuild_hflags_common_32(CPUARMState *env, int fp_el,
return rebuild_hflags_common(env, fp_el, mmu_idx, flags);
}
+static uint32_t rebuild_hflags_m32(CPUARMState *env, int fp_el,
+ ARMMMUIdx mmu_idx)
+{
+ uint32_t flags = 0;
+
+ if (arm_v7m_is_handler_mode(env)) {
+ flags = FIELD_DP32(flags, TBFLAG_A32, HANDLER, 1);
+ }
+
+ /*
+ * v8M always applies stack limit checks unless CCR.STKOFHFNMIGN
+ * is suppressing them because the requested execution priority
+ * is less than 0.
+ */
+ if (arm_feature(env, ARM_FEATURE_V8) &&
+ !((mmu_idx & ARM_MMU_IDX_M_NEGPRI) &&
+ (env->v7m.ccr[env->v7m.secure] & R_V7M_CCR_STKOFHFNMIGN_MASK))) {
+ flags = FIELD_DP32(flags, TBFLAG_A32, STACKCHECK, 1);
+ }
+
+ return rebuild_hflags_common_32(env, fp_el, mmu_idx, flags);
+}
+
static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el,
ARMMMUIdx mmu_idx)
{
@@ -11168,7 +11191,13 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
}
} else {
*pc = env->regs[15];
- flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0);
+
+ if (arm_feature(env, ARM_FEATURE_M)) {
+ flags = rebuild_hflags_m32(env, fp_el, mmu_idx);
+ } else {
+ flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0);
+ }
+
flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb);
flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, env->vfp.vec_len);
flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, env->vfp.vec_stride);
@@ -11204,20 +11233,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
}
}
- if (arm_v7m_is_handler_mode(env)) {
- flags = FIELD_DP32(flags, TBFLAG_A32, HANDLER, 1);
- }
-
- /* v8M always applies stack limit checks unless CCR.STKOFHFNMIGN is
- * suppressing them because the requested execution priority is less than 0.
- */
- if (arm_feature(env, ARM_FEATURE_V8) &&
- arm_feature(env, ARM_FEATURE_M) &&
- !((mmu_idx & ARM_MMU_IDX_M_NEGPRI) &&
- (env->v7m.ccr[env->v7m.secure] & R_V7M_CCR_STKOFHFNMIGN_MASK))) {
- flags = FIELD_DP32(flags, TBFLAG_A32, STACKCHECK, 1);
- }
-
if (arm_feature(env, ARM_FEATURE_M_SECURITY) &&
FIELD_EX32(env->v7m.fpccr[M_REG_S], V7M_FPCCR, S) != env->v7m.secure) {
flags = FIELD_DP32(flags, TBFLAG_A32, FPCCR_S_WRONG, 1);
--
2.17.1
next prev parent reply other threads:[~2019-10-11 16:05 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-11 15:55 [PATCH v6 00/20] target/arm: Reduce overhead of cpu_get_tb_cpu_state Richard Henderson
2019-10-11 15:55 ` [PATCH v6 01/20] target/arm: Split out rebuild_hflags_common Richard Henderson
2019-10-11 15:55 ` [PATCH v6 02/20] target/arm: Split out rebuild_hflags_a64 Richard Henderson
2019-10-14 15:43 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 03/20] target/arm: Split out rebuild_hflags_common_32 Richard Henderson
2019-10-14 15:53 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 04/20] target/arm: Split arm_cpu_data_is_big_endian Richard Henderson
2019-10-14 16:01 ` Alex Bennée
2019-10-11 15:55 ` Richard Henderson [this message]
2019-10-14 16:13 ` [PATCH v6 05/20] target/arm: Split out rebuild_hflags_m32 Alex Bennée
2019-10-11 15:55 ` [PATCH v6 06/20] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state Richard Henderson
2019-10-14 16:17 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 07/20] target/arm: Split out rebuild_hflags_a32 Richard Henderson
2019-10-14 16:17 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 08/20] target/arm: Split out rebuild_hflags_aprofile Richard Henderson
2019-10-14 16:19 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 09/20] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state Richard Henderson
2019-10-14 16:39 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 10/20] target/arm: Simplify set of PSTATE_SS " Richard Henderson
2019-10-14 18:21 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 11/20] target/arm: Hoist computation of TBFLAG_A32.VFPEN Richard Henderson
2019-10-14 18:46 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 12/20] target/arm: Add arm_rebuild_hflags Richard Henderson
2019-10-14 18:47 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 13/20] target/arm: Split out arm_mmu_idx_el Richard Henderson
2019-10-14 18:49 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 14/20] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state Richard Henderson
2019-10-14 18:51 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 15/20] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}) Richard Henderson
2019-10-14 18:59 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 16/20] target/arm: Rebuild hflags at EL changes Richard Henderson
2019-10-14 19:01 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 17/20] target/arm: Rebuild hflags at MSR writes Richard Henderson
2019-10-14 19:03 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 18/20] target/arm: Rebuild hflags at CPSR writes Richard Henderson
2019-10-14 19:08 ` Alex Bennée
2019-10-14 19:15 ` Richard Henderson
2019-10-11 15:55 ` [PATCH v6 19/20] target/arm: Rebuild hflags for M-profile Richard Henderson
2019-10-14 19:08 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 20/20] target/arm: Rely on hflags correct in cpu_get_tb_cpu_state Richard Henderson
2019-10-17 15:26 ` [PATCH v6 00/20] target/arm: Reduce overhead of cpu_get_tb_cpu_state Peter Maydell
2019-10-17 16:25 ` Richard Henderson
2019-10-17 17:01 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20191011155546.14342-6-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=laurent.desnogues@gmail.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).