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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 26/68] target/arm/arm-semi: Always set some kind of errno for failed calls
Date: Mon, 14 Oct 2019 17:03:22 +0100	[thread overview]
Message-ID: <20191014160404.19553-27-peter.maydell@linaro.org> (raw)
In-Reply-To: <20191014160404.19553-1-peter.maydell@linaro.org>

If we fail a semihosting call we should always set the
semihosting errno to something; we were failing to do
this for some of the "check inputs for sanity" cases.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190916141544.17540-3-peter.maydell@linaro.org
---
 target/arm/arm-semi.c | 45 ++++++++++++++++++++++++++-----------------
 1 file changed, 27 insertions(+), 18 deletions(-)

diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c
index 03e60105c05..51b55816faf 100644
--- a/target/arm/arm-semi.c
+++ b/target/arm/arm-semi.c
@@ -232,11 +232,13 @@ static target_ulong arm_gdb_syscall(ARMCPU *cpu, gdb_syscall_complete_cb cb,
 #define GET_ARG(n) do {                                 \
     if (is_a64(env)) {                                  \
         if (get_user_u64(arg ## n, args + (n) * 8)) {   \
-            return -1;                                  \
+            errno = EFAULT;                             \
+            return set_swi_errno(ts, -1);               \
         }                                               \
     } else {                                            \
         if (get_user_u32(arg ## n, args + (n) * 4)) {   \
-            return -1;                                  \
+            errno = EFAULT;                             \
+            return set_swi_errno(ts, -1);               \
         }                                               \
     }                                                   \
 } while (0)
@@ -287,12 +289,13 @@ target_ulong do_arm_semihosting(CPUARMState *env)
         GET_ARG(2);
         s = lock_user_string(arg0);
         if (!s) {
-            /* FIXME - should this error code be -TARGET_EFAULT ? */
-            return (uint32_t)-1;
+            errno = EFAULT;
+            return set_swi_errno(ts, -1);
         }
         if (arg1 >= 12) {
             unlock_user(s, arg0, 0);
-            return (uint32_t)-1;
+            errno = EINVAL;
+            return set_swi_errno(ts, -1);
         }
         if (strcmp(s, ":tt") == 0) {
             int result_fileno = arg1 < 4 ? STDIN_FILENO : STDOUT_FILENO;
@@ -413,8 +416,8 @@ target_ulong do_arm_semihosting(CPUARMState *env)
         } else {
             s = lock_user_string(arg0);
             if (!s) {
-                /* FIXME - should this error code be -TARGET_EFAULT ? */
-                return (uint32_t)-1;
+                errno = EFAULT;
+                return set_swi_errno(ts, -1);
             }
             ret =  set_swi_errno(ts, remove(s));
             unlock_user(s, arg0, 0);
@@ -432,11 +435,12 @@ target_ulong do_arm_semihosting(CPUARMState *env)
             char *s2;
             s = lock_user_string(arg0);
             s2 = lock_user_string(arg2);
-            if (!s || !s2)
-                /* FIXME - should this error code be -TARGET_EFAULT ? */
-                ret = (uint32_t)-1;
-            else
+            if (!s || !s2) {
+                errno = EFAULT;
+                ret = set_swi_errno(ts, -1);
+            } else {
                 ret = set_swi_errno(ts, rename(s, s2));
+            }
             if (s2)
                 unlock_user(s2, arg2, 0);
             if (s)
@@ -456,8 +460,8 @@ target_ulong do_arm_semihosting(CPUARMState *env)
         } else {
             s = lock_user_string(arg0);
             if (!s) {
-                /* FIXME - should this error code be -TARGET_EFAULT ? */
-                return (uint32_t)-1;
+                errno = EFAULT;
+                return set_swi_errno(ts, -1);
             }
             ret = set_swi_errno(ts, system(s));
             unlock_user(s, arg0, 0);
@@ -517,19 +521,22 @@ target_ulong do_arm_semihosting(CPUARMState *env)
 
             if (output_size > input_size) {
                 /* Not enough space to store command-line arguments.  */
-                return -1;
+                errno = E2BIG;
+                return set_swi_errno(ts, -1);
             }
 
             /* Adjust the command-line length.  */
             if (SET_ARG(1, output_size - 1)) {
                 /* Couldn't write back to argument block */
-                return -1;
+                errno = EFAULT;
+                return set_swi_errno(ts, -1);
             }
 
             /* Lock the buffer on the ARM side.  */
             output_buffer = lock_user(VERIFY_WRITE, arg0, output_size, 0);
             if (!output_buffer) {
-                return -1;
+                errno = EFAULT;
+                return set_swi_errno(ts, -1);
             }
 
             /* Copy the command-line arguments.  */
@@ -544,7 +551,8 @@ target_ulong do_arm_semihosting(CPUARMState *env)
 
             if (copy_from_user(output_buffer, ts->info->arg_start,
                                output_size)) {
-                status = -1;
+                errno = EFAULT;
+                status = set_swi_errno(ts, -1);
                 goto out;
             }
 
@@ -614,7 +622,8 @@ target_ulong do_arm_semihosting(CPUARMState *env)
 
                 if (fail) {
                     /* Couldn't write back to argument block */
-                    return -1;
+                    errno = EFAULT;
+                    return set_swi_errno(ts, -1);
                 }
             }
             return 0;
-- 
2.20.1



  parent reply	other threads:[~2019-10-14 16:50 UTC|newest]

Thread overview: 76+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-14 16:02 [PULL 00/68] target-arm queue Peter Maydell
2019-10-14 16:02 ` [PULL 01/68] linux headers: update against v5.4-rc1 Peter Maydell
2019-10-14 16:02 ` [PULL 02/68] intc/arm_gic: Support IRQ injection for more than 256 vpus Peter Maydell
2019-10-14 16:02 ` [PULL 03/68] ARM: KVM: Check KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 for smp_cpus > 256 Peter Maydell
2019-10-14 16:03 ` [PULL 04/68] ptimer: Rename ptimer_init() to ptimer_init_with_bh() Peter Maydell
2019-10-14 16:03 ` [PULL 05/68] ptimer: Provide new transaction-based API Peter Maydell
2019-10-14 16:03 ` [PULL 06/68] tests/ptimer-test: Switch to transaction-based ptimer API Peter Maydell
2019-10-14 16:03 ` [PULL 07/68] hw/timer/arm_timer.c: " Peter Maydell
2019-10-14 16:03 ` [PULL 08/68] hw/arm/musicpal.c: " Peter Maydell
2019-10-14 16:03 ` [PULL 09/68] hw/timer/allwinner-a10-pit.c: " Peter Maydell
2019-10-14 16:03 ` [PULL 10/68] hw/timer/arm_mptimer.c: " Peter Maydell
2019-10-14 16:03 ` [PULL 11/68] hw/timer/cmsdk-apb-dualtimer.c: " Peter Maydell
2019-10-14 16:03 ` [PULL 12/68] hw/timer/cmsdk-apb-timer.c: " Peter Maydell
2019-10-14 16:03 ` [PULL 13/68] hw/timer/digic-timer.c: " Peter Maydell
2019-10-14 16:03 ` [PULL 14/68] hw/timer/exynos4210_mct.c: Switch GFRC " Peter Maydell
2019-10-14 16:03 ` [PULL 15/68] hw/timer/exynos4210_mct.c: Switch LFRC " Peter Maydell
2019-10-14 16:03 ` [PULL 16/68] hw/timer/exynos4210_mct.c: Switch ltick " Peter Maydell
2019-10-14 16:03 ` [PULL 17/68] hw/timer/exynos4210_pwm.c: Switch " Peter Maydell
2019-10-14 16:03 ` [PULL 18/68] hw/timer/exynos4210_rtc.c: Switch 1Hz ptimer to transaction-based API Peter Maydell
2019-10-14 16:03 ` [PULL 19/68] hw/timer/exynos4210_rtc.c: Switch main " Peter Maydell
2019-10-14 16:03 ` [PULL 20/68] hw/timer/imx_epit.c: Switch to transaction-based ptimer API Peter Maydell
2019-10-14 16:03 ` [PULL 21/68] hw/timer/imx_gpt.c: " Peter Maydell
2019-10-14 16:03 ` [PULL 22/68] hw/timer/mss-timerc: " Peter Maydell
2019-10-14 16:03 ` [PULL 23/68] hw/watchdog/cmsdk-apb-watchdog.c: " Peter Maydell
2019-10-14 16:03 ` [PULL 24/68] hw/net/lan9118.c: " Peter Maydell
2019-10-14 16:03 ` [PULL 25/68] target/arm/arm-semi: Capture errno in softmmu version of set_swi_errno() Peter Maydell
2019-10-14 16:03 ` Peter Maydell [this message]
2019-10-14 16:03 ` [PULL 27/68] target/arm/arm-semi: Correct comment about gdb syscall races Peter Maydell
2019-10-14 16:03 ` [PULL 28/68] target/arm/arm-semi: Make semihosting code hand out its own file descriptors Peter Maydell
2019-10-14 16:03 ` [PULL 29/68] target/arm/arm-semi: Restrict use of TaskState* Peter Maydell
2019-10-14 16:03 ` [PULL 30/68] target/arm/arm-semi: Use set_swi_errno() in gdbstub callback functions Peter Maydell
2019-10-14 16:03 ` [PULL 31/68] target/arm/arm-semi: Factor out implementation of SYS_CLOSE Peter Maydell
2019-10-14 16:03 ` [PULL 32/68] target/arm/arm-semi: Factor out implementation of SYS_WRITE Peter Maydell
2019-10-14 16:03 ` [PULL 33/68] target/arm/arm-semi: Factor out implementation of SYS_READ Peter Maydell
2019-10-14 16:03 ` [PULL 34/68] target/arm/arm-semi: Factor out implementation of SYS_ISTTY Peter Maydell
2019-10-14 16:03 ` [PULL 35/68] target/arm/arm-semi: Factor out implementation of SYS_SEEK Peter Maydell
2019-10-14 16:03 ` [PULL 36/68] target/arm/arm-semi: Factor out implementation of SYS_FLEN Peter Maydell
2019-10-14 16:03 ` [PULL 37/68] target/arm/arm-semi: Implement support for semihosting feature detection Peter Maydell
2019-10-14 16:03 ` [PULL 38/68] target/arm/arm-semi: Implement SH_EXT_EXIT_EXTENDED extension Peter Maydell
2019-10-14 16:03 ` [PULL 39/68] target/arm/arm-semi: Implement SH_EXT_STDOUT_STDERR extension Peter Maydell
2019-10-14 16:03 ` [PULL 40/68] aspeed/wdt: Check correct register for clock source Peter Maydell
2019-10-14 16:03 ` [PULL 41/68] hw/sd/aspeed_sdhci: New device Peter Maydell
2019-10-14 16:03 ` [PULL 42/68] hw: aspeed_scu: Add AST2600 support Peter Maydell
2019-10-14 16:03 ` [PULL 43/68] aspeed/timer: Introduce an object class per SoC Peter Maydell
2019-10-14 16:03 ` [PULL 44/68] aspeed/timer: Add support for control register 3 Peter Maydell
2019-10-14 16:03 ` [PULL 45/68] aspeed/timer: Add AST2600 support Peter Maydell
2019-10-14 16:03 ` [PULL 46/68] aspeed/timer: Add support for IRQ status register on the AST2600 Peter Maydell
2019-10-14 16:03 ` [PULL 47/68] aspeed/sdmc: Introduce an object class per SoC Peter Maydell
2019-10-14 16:03 ` [PULL 48/68] aspeed/sdmc: Add AST2600 support Peter Maydell
2019-10-14 16:03 ` [PULL 49/68] watchdog/aspeed: Introduce an object class per SoC Peter Maydell
2019-10-14 16:03 ` [PULL 50/68] hw: wdt_aspeed: Add AST2600 support Peter Maydell
2019-10-14 16:03 ` [PULL 51/68] aspeed/smc: Introduce segment operations Peter Maydell
2019-10-14 16:03 ` [PULL 52/68] aspeed/smc: Add AST2600 support Peter Maydell
2019-10-14 16:03 ` [PULL 53/68] hw/gpio: Add in AST2600 specific implementation Peter Maydell
2019-10-14 16:03 ` [PULL 54/68] aspeed/i2c: Introduce an object class per SoC Peter Maydell
2019-10-14 16:03 ` [PULL 55/68] aspeed/i2c: Add AST2600 support Peter Maydell
2019-10-14 16:03 ` [PULL 56/68] aspeed: Introduce an object class per SoC Peter Maydell
2019-10-14 16:03 ` [PULL 57/68] aspeed/soc: Add AST2600 support Peter Maydell
2019-10-14 16:03 ` [PULL 58/68] m25p80: Add support for w25q512jv Peter Maydell
2019-10-14 16:03 ` [PULL 59/68] aspeed: Add an AST2600 eval board Peter Maydell
2019-10-15 17:03   ` Peter Maydell
2019-10-15 17:43     ` Cédric Le Goater
2019-10-15 17:55       ` Peter Maydell
2019-10-16 11:28         ` Joel Stanley
2019-10-16 12:20     ` Philippe Mathieu-Daudé
2019-10-16 12:41       ` Cédric Le Goater
2019-10-16 12:44         ` Philippe Mathieu-Daudé
2019-10-14 16:03 ` [PULL 60/68] aspeed: Parameterise number of MACs Peter Maydell
2019-10-14 16:03 ` [PULL 61/68] aspeed: add support for the Aspeed MII controller of the AST2600 Peter Maydell
2019-10-14 16:03 ` [PULL 62/68] aspeed/soc: Add ASPEED Video stub Peter Maydell
2019-10-14 16:03 ` [PULL 63/68] hw/arm/raspi: Use the IEC binary prefix definitions Peter Maydell
2019-10-14 16:04 ` [PULL 64/68] hw/arm/bcm2835_peripherals: Improve logging Peter Maydell
2019-10-14 16:04 ` [PULL 65/68] hw/arm/bcm2835_peripherals: Name various address spaces Peter Maydell
2019-10-14 16:04 ` [PULL 66/68] hw/arm/bcm2835: Rename some definitions Peter Maydell
2019-10-14 16:04 ` [PULL 67/68] hw/arm/bcm2835: Add various unimplemented peripherals Peter Maydell
2019-10-14 16:04 ` [PULL 68/68] hw/misc/bcm2835_mbox: Add trace events Peter Maydell

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