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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id n15sm2703392wrw.47.2019.10.17.06.29.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Oct 2019 06:29:06 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PATCH 0/8] Convert misc-arch devices to new ptimer API Date: Thu, 17 Oct 2019 14:28:57 +0100 Message-Id: <20191017132905.5604-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::344 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , "Edgar E. Iglesias" , Michael Walle , Guan Xuetao , Magnus Damm Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This patchset converts the devices used by the miscellaneous minor architecture machines to the new ptimer API. More specifically: cris: hw/timer/etraxfs_timer.c lm32: hw/timer/lm32_timer.c hw/timer/milkymist-sysctl.c nios2: hw/timer/altera_timer.c sh4: hw/timer/sh_timer.c unicore32: hw/timer/puv3_ost.c m68k: hw/m68k/mcf5206.c hw/m68k/mcf5208.c Currently the ptimer design uses a QEMU bottom-half as its mechanism for calling back into the device model using the ptimer when the timer has expired. Unfortunately this design is fatally flawed, because it means that there is a lag between the ptimer updating its own state and the device callback function updating device state, and guest accesses to device registers between the two can return inconsistent device state. This was reported as a bug in a specific timer device but it's a problem with the generic ptimer code: https://bugs.launchpad.net/qemu/+bug/1777777 The updates to the individual ptimer devices are straightforward: we need to add begin/commit calls around the various places that modify the ptimer state, and use the new ptimer_init() function to create the timer. Testing I have done: * 'make check' * running a milkymist system image I had lying around * running an sh4 system image This doesn't exercise the devices very much, so more specific testing would be appreciated. I plan to collect these patches up and get them into the tree with other ptimer-related changes (probably via target-arm just for convenience) unless anybody would specifically like to take a patch via some other tree. thanks --PMM Peter Maydell (8): hw/timer/puv3_ost.c: Switch to transaction-based ptimer API hw/timer/sh_timer: Switch to transaction-based ptimer API hw/timer/lm32_timer: Switch to transaction-based ptimer API hw/watchdog/milkymist-sysctl.c: Switch to transaction-based ptimer API hw/timer/altera_timer.c: Switch to transaction-based ptimer API hw/watchdog/etraxfs_timer.c: Switch to transaction-based ptimer API hw/m68k/mcf5206.c: Switch to transaction-based ptimer API hw/m68k/mcf5208.c: Switch to transaction-based ptimer API hw/m68k/mcf5206.c | 9 +++++---- hw/m68k/mcf5208.c | 9 +++++---- hw/timer/altera_timer.c | 13 +++++++++---- hw/timer/etraxfs_timer.c | 23 +++++++++++++---------- hw/timer/lm32_timer.c | 13 +++++++++---- hw/timer/milkymist-sysctl.c | 25 ++++++++++++++++++------- hw/timer/puv3_ost.c | 9 +++++---- hw/timer/sh_timer.c | 13 +++++++++---- 8 files changed, 73 insertions(+), 41 deletions(-) -- 2.20.1